On December 16th Analog Devices announced a new member of its high-performance fixed-/floating-point TigerSHARC family, the ADSP-TS101S. The chip runs at 300 MHz in a 0.13-micron process and is already in full production at this speed, according to ADI. The ADSP-TS101S is intended for high-performance multiprocessor applications, including telecommunications infrastructure, medical imaging, industrial instrumentation, and military electronics.

In April Intrinsity announced general sampling of the 1.5 and 2 GHz versions of its FastMIPS and FastMATH processors. Both processors are based on the MIPS32 architecture; the FastMATH processor adds a matrix math engine to the baseline architecture.

Intel’s PXA2xx processor family is making significant headway in the high-end PDA market. Last month, for example, Sony began shipping the first Palm OS-based PDA powered by a PXA2xx. Although the PXA2xx has gained wide acceptance in high-end PDAs, some reviewers (for example, at CNET.com) have complained that PXA2xx-based PDAs are not appreciably faster than PDAs based on its predecessor, StrongARM. Some reviewers have been particularly critical of the lack of improvement on multimedia applications.

Last month BDTI participated in the Software Defined Radio Forum’s first conference. Judging from the presentations given at this conference, software defined radio (SDR) is quickly evolving from an interesting but somewhat academic concept to a mainstream technology.

In October, ARM Ltd. announced two unhappy firsts: its first-ever quarter-to-quarter sales decline, and its first layoffs. Prior to these developments, ARM seemed to have discovered a bulletproof business model that was easy to mimic: just whip up a core, license it, and let the royalty checks roll in. Indeed, ARM’s previously uninterrupted ascent, coupled with the ready availability of venture capital, gave rise to a flood of new processor core licensors in the late 90’s.

BOPS, Inc. quietly began auctioning off its patent portfolio last month, signaling the end of its operations as a vendor of high performance licensable DSP cores. Given the current business climate, the failure of another licensable core vendor is hardly surprising. (For more examples, see our story on Lexra.)  However, BOPS had a few things working against it beyond the industry slow-down.

Last month Intel announced its “Wireless MMX” extensions for its ARM-based XScale architecture. Wireless MMX includes functionality equivalent to the integer components of the x86 MMX and SSE instruction sets. Like its x86 counterparts, Wireless MMX uses single-instruction multiple-data (SIMD) techniques to perform eight 8-bit, four 16-bit, two 32-bit, or (in a few cases) one 64-bit operation with a single instruction.