Last month Intel announced its “Wireless MMX” extensions for its ARM-based XScale architecture. Wireless MMX includes functionality equivalent to the integer components of the x86 MMX and SSE instruction sets. Like its x86 counterparts, Wireless MMX uses single-instruction multiple-data (SIMD) techniques to perform eight 8-bit, four 16-bit, two 32-bit, or (in a few cases) one 64-bit operation with a single instruction.
Although the x86 and XScale implementations of MMX provide equivalent integer functionality, the underlying microarchitectures are dramatically different. For example, x86 processors use complex superscalar multiple-issue designs, while XScale uses a simple single-issue design. As a result, x86 MMX-optimized software will require substantial re-optimization for maximum performance on Wireless MMX-enabled XScale processors. However, Intel plans to support both MMX variants with its IPP library of DSP functions. (See the May 2002 DSP Insider at http://www.BDTI.com/dspinsider/archives/dspinsider_020501.html for details on IPP.)
The data-type agility featured in Wireless MMX is common among PC-oriented processors, but is rare among embedded processors, particularly those that target battery-powered applications. The 8-bit capabilities of Wireless MMX are particularly notable, as they include operations that should greatly improve XScale’s performance in video and imaging applications. The 32-bit capabilities are also notable; they will make Wireless MMX an attractive target for audio applications. Despite its name, Wireless MMX does not include instructions specifically targeting wireless communications processing, such as instructions for accelerating Viterbi decoders.
In addition to the new operations, Wireless MMX adds a bank of sixteen 64-bit registers. This register bank is unusually large. In comparison, the base XScale architecture contains sixteen 32-bit registers—and three of these registers are reserved for special uses. The large Wireless MMX register bank should reduce the need to shuffle data between registers and memory, which will increase application performance and reduce power consumption.
In recent months, Intel and TI—among many others—have been posturing for dominance in so-called “application processors” for future mobile multimedia devices. With Wireless MMX, Intel hopes to bolster its position by increasing the ties between its PC-oriented processors and its application processors. The success of this approach will depend largely on how well the first Wireless MMX-enhanced processors perform in comparison to competitors like TI’s OMAP.
According to Intel, the first Wireless MMX-enhanced processors will be available in eighteen months. Intel has not yet disclosed the expected clock speeds or pricing for these processors.
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