Low-Power

Jeff Bier’s Impulse Response—Efficiency Comes in Many Flavors

It’s generally accepted that, for processing engines, there is a trade-off between efficiency and generality.  The more a chip is geared towards a specific application, the more efficient it’s likely to be (in terms of speed, energy consumption, and cost).  On one end of the spectrum you have traditional FPGAs, which are completely general-purpose, and on the other are fixed-function chips, which are completely application specific. In between these extremes lie various types of processors, Read more...

Stretch Announces Second-generation Software Configurable Processor

On March 5, Stretch, Inc. announced its second-generation software configurable processor family, the S6000, and two initial chips. With this offering—its first since the appointment last year of a new CEO—Stretch is mainly targeting video surveillance, video broadcast, and WiMAX basestation applications. The S6000, like the previous-generation S5000 family, is a RISC processor which incorporates a reconfigurable compute fabric within its datapath. The fabric (which Stretch calls ISEF) Read more...

Stream Processors Unveils Data-parallel Processor Architecture

Stream Processors, Inc. (SPI) this week unveiled its data-parallel processor architecture and announced two chips based on the architecture.  According to SPI, its architecture is optimized for compute-intensive embedded applications which exhibit a high degree of data parallelism, such as video and imaging.  SPI believes that cost-performance and developer productivity advantages will enable its chips to compete successfully against FPGAs, high-end DSPs, and ASICs in these applications. Read more...

Case Study: Cool Algorithm, But Will It Fit in My Product?

Algorithms are the essence of digital signal processing; they are the mathematical “recipes” that transform signals in useful ways. Companies developing new DSP algorithms, or considering purchasing or licensing algorithms, often need to assess whether the algorithm will fit within their processing budget–and thereby within their cost and power consumption targets.    But estimating an algorithm’s processing load can be difficult if the algorithm has not already been carefully mapped onto Read more...

Texas Instruments Announces Multi-core Baseband Processor

In December Texas Instruments announced the TCI6487 multi-core baseband processor. The device will be manufactured in a 65 nm process and is intended mainly for GSM, TD-SCDMA and WiMAX basestation applications. The TCI6487 features three TMS320C64x+ DSP cores running at 1 GHz. In comparison, its predecessor, the TCI6482, featured a single 1 GHz ‘64x+ core. TI has also added an antenna interface supporting OBSAI and CPRI protocols. DSP cores in the TCI6487 communicate with each other and Read more...

PicoChip: Defying the Odds

Editor’s Note: The past year or so has brought a wave of parallel-processor start-ups pursuing digital signal processing applications.  But what about the previous wave?  In the late 1990s and into 2001, a large number of start-ups emerged with unique processor architectures targeting applications like wireless infrastructure.  The vast majority of these, such as Chameleon, Morphics, and Quicksilver, are long gone.  PicoChip, founded in 2000, is an interesting exception.  In this article, Read more...

Altera Hones DSP Capabilities with Stratix III FPGAs

In November Altera announced the Stratix III family, its next generation of field-programmable gate arrays (FPGAs). The new devices will be fabricated in a 65 nm process and feature a number of significant architectural changes.  To reduce power consumption, Altera has introduced “Programmable Power Technology,” which allows blocks of logic that don’t need to run at maximum speed to run in a slower, low-power mode.  The sizes of hard-wired memory blocks have been changed relative to the Read more...

Sandbridge Launches Power-Optimized Programmable Handset Processor

Today fabless chip start-up Sandbridge announced its new SB3011 chip, a low-power derivative of the SB3010 chip announced in July 2005.  The chip is fully programmable and is aimed at replacing baseband and application processors in cellular handsets.  Sandbridge will face stiff competition from dominant players such as TI and Qualcomm that have close relationships with handset manufacturers, but the company remains optimistic; the company recently received $15.4 million in Series B funding Read more...

Atmel Introduces 32-bit MPU with DSP Features

Last month Atmel announced the AVR32, a 32-bit microprocessor core with signal-processing-oriented features.  The AVR32 targets computationally intensive, battery-powered applications such as consumer entertainment devices.  Atmel plans to announce AVR32-based chips later this year; the core will also be available through Atmel’s ASIC-design services. The AVR32 joins a growing list of 32-bit microprocessors targeting these applications.  At a high level, the AVR32 is very similar to two of Read more...

Case Study—Measuring Processor Energy Consumption

Energy consumption is a chief concern for many digital signal processing applications, especially for portable applications where battery life is paramount. In these applications, an accurate understanding of energy consumption is critical to processor selection and to system design. Unfortunately, many obstacles hinder comparisons of processors’ energy consumption. One key problem is that vendors usually report power consumption, not energy consumption. Calculating energy consumption— Read more...