Semiconductor memory is increasing in capacity and cost-effectiveness all the time. Yet, there are plenty of deeply embedded applications for which every spare byte of RAM or flash memory is a precious commodity, especially those leveraging memory integrated onto an SOC of processor, rather than external discrete memory. Throw in a performance-constrained processor (intentionally speed-limited to minimize power consumption), a small battery, and a multi-day battery life requirement, and you've got a challenging design on your hands.
Recently, a company with just such a project approached BDTI with the request to "scrub" its code for possible resource efficiency gains. The company's design team was hoping to add capabilities to its existing product, but the existing software—four sequentially executed sub-processes coordinated by a high-level master process—currently consumed all of the available processor cycles. The company had already gone through the master process with a fine-toothed comb; it contracted BDTI to scrutinize the digital signal processing-focused sub-processes.
Code size limitations precluded many standard optimizations such as additional loop unrolling. And an initial examination of the software, coded entirely in assembly language for efficiency, revealed no obvious wasted cycles. The company's R&D team (who had originally developed the code) had done a solid job, and "all of the low-hanging fruit had already been picked," in the words of one BDTI engineer assigned to the project. Nevertheless, thanks to a fresh set of eyes and a big bag of tricks, BDTI's staff still made several key improvements.
BDTI's efficiency optimizations concentrated on three levels of abstraction:
- Algorithm (mathematical)
- Code structure (architectural), and
- Low-level coding
For example, by reallocating functions from one sub-process to another as a load-rebalancing effort, the worst-case sub-process execution delay was reduced by more than 10%. Additional algorithm execution time reductions were achieved thanks to various coding improvements (such as function in-lining to reduce subroutine calls overhead, for example). Each of these improvements was minor, but cumulatively they had a big impact. And BDTI's engineers made further coding suggestions that the company plans to implement when it migrates to a next-generation processor with added features.
Although in this particular case the client's goal was to free up processing headroom for additional software capabilities, the optimizations that BDTI delivered have other potential benefits. They might, for example, enable the processing of more incoming data in a given amount of time, enabling a higher sampling rate or larger number of channels, for example. Alternatively, they might enable using a lower processor clock speed, thereby further increasing battery life. If you'd like to harness BDTI's software experts to optimize your code efficiency, contact Jeremy Giddings at +1 925 954 1411 or giddings@BDTI.com.