New BDTIsimMark2000™ Measures Pre-Silicon DSP Speed

Submitted by BDTI on Tue, 01/15/2002 - 20:00

Processor users often want a simplified way of comparing processors' speeds in DSP applications. To this end, BDTI publishes the BDTImark2000™, a single-number DSP speed metric based on BDTI's suite of DSP benchmarks, the BDTI Benchmarks™. Because it is based on realistic DSP algorithm kernel benchmarks, the BDTImark2000 characterizes a processor's signal processing speed far more accurately than traditional simplified measures such as MIPS or MFLOPS.

BDTI's policy is to verify its benchmarks on silicon before issuing a BDTImark2000 score. This policy helps to ensure that the score accurately reflects the performance that can be expected from actual silicon rather than relying on simulator predictions. However, performance information is sometimes needed prior to silicon availability; for example, a system-on-a-chip (SoC) designer may need to evaluate the performance of a licensable core before the core has been fabricated. To meet such needs, BDTI now publishes the BDTIsimMark2000(TM). This new metric is calculated in the same manner as the BDTImark2000, but does not require hardware verification.

One key difference between the BDTImark2000 and the BDTIsimMark2000 is the method used to select clock speeds. The BDTImark2000 is a score based on silicon and as such is calculated using the clock speed of the available silicon. For off-the-shelf chips, the BDTImark2000 is calculated based on the clock speed of the fastest processor sampling to customers; for cores, it is based on the highest clock speed that has been demonstrated in silicon in either a development chip or an SoC. In contrast, the BDTIsimMark2000 will use a projected clock speed. For licensable cores, the BDTIsimMark2000 will use the worst-case clock speed projected for the target fabrication process, since this is the speed with which designers typically are most concerned. Although BDTI will rely upon processor vendors to supply the projected clock speed, it will evaluate the stated speed based on a variety of factors (such as the target fabrication process) and will adjust the projection as necessary to obtain what it believes to be a credible clock speed.

Although BDTIsimMark2000 and BDTImark2000 scores are calculated in the same manner, they should be compared with caution. In the time that it takes for a pre-silicon processor to reach production, competing vendors may achieve higher clock speeds or may introduce new architectures with higher performance. In addition, a processor may not perform as expected when it reaches production due to differences between the projected and actual clock speed and/or differences between the behavior of the silicon and that predicted by the simulator. The SP-5, a licensable core from 3DSP, is the first processor to receive a BDTIsimMark2000 score. Its BDTIsimMark2000 score is 1720 at 225 MHz. (3DSP projects a typical clock speed of 320 MHz for a 0.13 um process; BDTI adjusted 3DSP's projection to obtain what it believes to be a reasonable worst-case speed.) This score can be compared with the BDTImark2000 score for the Carmel 10xx, which is 1390 at 188 MHz (188 MHz is the current top clock speed achieved in silicon, according to Infineon). Based on their scores, the SP-5 at 225 MHz will be about 25% faster than the Carmel 10xx at 188 MHz; however, the Carmel 10xx has had its BDTI Benchmarks verified on silicon, while the SP-5 has not. Thus, the performance of the SP-5 indicated by its BDTIsimMark2000 score must be considered to be somewhat less reliable than the result for the Carmel 10xx. (These cores are analyzed in BDTI's reports, "Inside the 3DSP SP-5" and "Inside the Infineon Carmel;" please visit for more information on these reports.)

BDTI will begin publishing BDTIsimMark2000 scores on its web site in the coming months. BDTI's web site will also explain the assumptions used to select the clock speeds for each of the BDTIsimMark2000 scores. For more information on the BDTImark2000, please visit

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