July 29, 2010 | Write the first comment.
This spring, ARM added the Cortex-M4 digital signal controller (DSC) to its processor core line-up. This product brings digital signal processing capabilities to ARM’s microcontroller core line (the Cortex-M family). At the Embedded Systems Conference in San Jose in April, NXP
Octasic Semiconductor recently announced the OCT2200 family of multi-core DSP processors based on its Opus clockless (asynchronous) DSP core. The OCT2224M is intended for media processing equipment including video conferencing systems, internet video streaming and transcoding, and video
Altera recently disclosed architecture details of its next generation Stratix V FPGA family. The architecture features a variable-precision DSP block, designed to provide better resource utilization for algorithms requiring a variety of data widths. Altera represents this approach
Freescale has announced a new high-performance DSP product line, the MSC825x, incorporating up to six StarCore SC3850 DSP cores at up to 1 GHz. Unlike other high-performance DSPs introduced by Freescale in recent years—which were aimed almost exclusively at wireless infrastructure
May 20, 2010 |
Posted in Automotive, Communication, FPGAs, Low-Power, Processors, Software Development, Tools, Video| Write the first comment.
Xilinx recently unveiled a new chip architecture integrating an ARM processor with an FPGA fabric. This platform centers around a dual-core ARM Cortex-A9 processor complex, including hardened memory interfaces and peripherals. The platform architecture, shown in Figure 1, is intended to
Analog Devices, Inc (ADI) has announced new members of its floating-point SHARC processor family featuring lower prices and offering LQFP packages, which are easier to use in older, lower-cost manufacturing facilities. The new SHARC products target digital audio, industrial, automotive, and
CEVA recently announced its third-generation video processor IP offering. The CEVA-MM3000™ is a programmable subsystem which is designed to support video decode and encode using many video standards, including H.264, VC1, RealVideo and AVS at resolutions up to 1080p (1920×1080
TI has unveiled a new chip-level architecture for high-performance, multi-core DSP-processor-based SoCs. Most notable among its features are new on-chip and chip-to-chip interconnection mechanisms, an upgraded high-performance DSP core, and both hardware and tools support for programming
Analog Devices, Inc. (ADI) has announced new members of the Blackfin processor family targeting control-loop applications. The new BF50x parts sport a much larger “executable” flash in place of the serial flash offered in earlier Blackfin chips, and integrate a 12-bit
In October of 2007, I wrote a column called “ When Worlds Collide ,” which was about NVIDIA’s emerging strategy of offering “general-purpose GPUs.” At the time, I thought it was interesting that NVIDIA had begun to move beyond graphics applications to target