At NVIDIA's GTC (the yearly GPU Technology Conference) in March, the company trumpeted its intentions to broadly supply the embedded market with Tegra SoCs and associated hardware and software development tools. As a specific example of this overarching strategy, NVIDIA unveiled a small form
By now, most people who work with processors—whether in data centers, PCs, mobile devices, or embedded systems—understand that parallel processing is the way to get both high compute performance and good energy efficiency for most applications. And most of these people also realize that
Back in October 2011 , InsideDSP covered both recently introduced and pending CPU-plus-GPU products from AMD, along with the cores that they were based on. At the time, AMD referred to CPU-plus-GPU integration as "Fusion"; the company has subsequently renamed such products as APUs
Those of you familiar with Analog Devices' longstanding presence in the DSP market, via the company's Blackfin, SHARC and TigerSHARC product lines, can be forgiven for assuming that SigmaDSP is yet another family of general-purpose DSPs ( Figure 1 ). Figure 1. SigmaDSP is an
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Investment in a particular technology segment, not only by small startups but also by established suppliers, tends to be a dependable indication that the application has large business potential and lengthy staying power. Consider embedded vision, the use of computer vision techniques to extract
As applications become more complex, and processors become more powerful, system developers increasingly rely on off-the-shelf software components to enable rapid and efficient application development. This is particularly true in digital signal processing, where application developers expect to
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Smartphone application processor chips incorporate numerous processor cores, typically including multiple CPU cores, GPUs, DSPs, video processors, and image signal processors. Considering all the processing power available in these chips, why does Motorola's recently introduced Moto X
Posted in Processors
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Instruction set flexibility can go a long way toward extending the usable life of a processor architecture. Sooner or later, however, instruction set enhancements to an existing architecture foundation run out of steam, and a more fundamental evolution is necessary. This explains why Cadence Fellow
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The title of the press release for CEVA's latest XC-4500 communications DSP core , introduced in mid-October, claims that it's the "World's First Vector Floating-Point DSP for Wireless Infrastructure Solutions." Those of you with good memories might be confused at this
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Conventional wisdom dictates that an arithmetic circuit that generates inexact results is faulty. But Joe Bates, founder and president of Singular Computing, thinks that conventional wisdom may be mistaken, at least for certain classes of applications. Bates, in his own words, has spent roughly