- Case Study: Choosing the Right Benchmarks for the Job
- New CEVA DSP Cores Eye Expanded LTE Usage
- Next-Gen Cadence Tensilica Vision Processor Core Claims Big Performance, Energy Consumption Gains
- Jeff Bier’s Impulse Response—Intuition in a Box?
- Case Study: Cool Algorithm, But Will It Fit in My Product?
Hear the words "high volume DSP market" and you might automatically think of "mobile phones". And you'd be right; recent estimates peg quarterly worldwide mobile phone shipments approaching half a trillion units, with smartphones (which often contain multiple DSP
The "Internet of Things" (IoT), one of the hottest topics in technology today, is widely anticipated to be a notable driver of both semiconductor and software demand in coming years. Key to an understanding of the IoT opportunity, as a recent article published on the Embedded Vision
March 02, 2015 | Write the first comment.
Massively parallel processor supplier Tilera is a company that InsideDSP has kept an eye on for nearly a decade now, stretching back to BDTI's benchmarking of the company's first-generation TILE architecture in its 64-core form (see sidebar " Company, Architecture and Product
The title of the press release for CEVA's latest XC-4500 communications DSP core , introduced in mid-October, claims that it's the "World's First Vector Floating-Point DSP for Wireless Infrastructure Solutions." Those of you with good memories might be confused at this
May 22, 2013 | Write the first comment.
The cellular base station and its associated infrastructure topology have remained largely unchanged throughout the industry's history to date, although upgrades have periodically occurred to address the needs of evolving voice and data standards. Within each base station are beefy
Adapteva's Epiphany Floating Point Processor Core: A Leading-Edge Lithography May Finally Open Doors
September 04, 2012 | Write the first comment.
Cost- and power consumption-sensitive digital signal processing applications tend to leverage fixed point processors, for a common fundamental reason: fixed-point processor cores are substantially less complex than their floating-point counterparts, leading to reductions in transistor count and
March 22, 2012 | Write the first comment.
After some five years of architecture definition work and several years of development, Freescale's new StarCore SC3900 DSP core will see its first silicon implementation next quarter in the QorIQ Qonverge B4860 processor for macrocell base station designs, unveiled last month at the Mobile
Technology advances ever onward over time, and in fact its pace has accelerated since Jack Kilby's initial integrated circuit demonstration in 1958. So it is that, while CEVA's DSP core licensees are demonstrating SoCs based on the company's current-generation CEVA-XC323 (see
The dearth of available wireless spectrum throughout the world, notably in the United States, is one of technology's hottest topics. It's driving network management policies such as bandwidth throttling, data usage caps, and blocks of particular ports, protocols and services, any or all
Next-Generation Power Architecture-Based SoCs Embrace Advanced Lithography, Core Virtualization, SIMD Instruction Set
Freescale's re-engagement with historical Power Architecture (previously known as PowerPC) CPU business segments, such as communications, industrial, medical, military, robotics, and surveillance systems, began in earnest at the June 2008 Freescale Technology Forum when the company unveiled