Processors

CEVA's Multimedia DSP Cores: A Framework for Accessing Them, and a New MM3101 Imaging Algorithm

In January 2013, InsideDSP covered the CEVA-MM3101, the company's first DSP core targeted not only at still and video image encoding and decoding tasks (akin to the prior-generation MM2000 and MM3000) but also at a variety of image and vision processing tasks. At that time, the company published the following table of MM3101 functions that it provides to its licensees (Table 1): Table 1. The initial extensive software function library unveiled in conjunction with the CEVA-MM3101 introduction Read more...

Jeff Bier’s Impulse Response—Are DSPs Dying?

Recently I heard a presentation from a start-up chip supplier promoting a new type of programmable architecture for baseband processing in cellular base stations and handsets. The company's CEO contended that digital signal processors (DSPs) are becoming passé, soon to be replaced by more modern architectures. This caused me to think about the future of DSPs. Industry pundits have been heralding the death of DSPs for over a decade.  And there's some evidence to support their view. For example Read more...

Case Study: BDTI-Developed, DSP-Enabled Algorithms Optimize Speaker Sound

The tension between cost and quality is one of the fundamental tradeoffs in the design of consumer electronics devices—and many other systems. Customers predominantly select among competing products based on price, especially in these challenging economic times, but consumers are also unwilling to short-change perceived quality. For example, to minimize bill-of-materials costs, engineers prefer to incorporate low-cost speakers in their designs. These entry-level transducers typically exhibit Read more...

The Cellular Base Station: ASOCS Asserts that C-RAN is a Superior Implementation

The cellular base station and its associated infrastructure topology have remained largely unchanged throughout the industry's history to date, although upgrades have periodically occurred to address the needs of evolving voice and data standards. Within each base station are beefy application-tailored, highly integrated DSPs from companies such as CEVA, Freescale, LSI, and Texas Instruments, all of which are regularly covered in InsideDSP. A beefy “backhaul” tether connects each base station Read more...

Case Study: Optimizing Evaluation Board Design Decisions

BDTI is well known for its software-related capabilities: performance- and power consumption-related benchmarking, for example, along with algorithm evaluation, and development and optimization work. But the company is no stranger to hardware, either. Take, for example, its recent testing of DSP functions implemented in Altera FPGAs, or its successful effort to quantify the power draw of audio processing algorithms running on tablet computers. Or take this month's case study, which stems from a Read more...

TrulyHandsFree: Always-On Speech Recognition From Sensory

"If it has speech recognition, why do we have to use our fingers?" According to Bernie Brafman, Vice President of Business Development at Sensory, that simple question has been at the forefront of many of the company's customers' minds throughout Sensory's 19-year existence. That same question has therefore guided the privately held company's technology and product roadmap. But actualizing this aspiration involves, at first glance, difficult tradeoffs. Always-active speech recognition requires Read more...

Case Study: Cool Algorithm, But Will It Fit in My Product?

Algorithms are the essence of digital signal processing; they are the mathematical "recipes" that transform signals in useful ways. Companies developing new algorithms, or considering purchasing or licensing algorithms, often need to assess whether an algorithm will fit within their processing budget—and thereby within their cost and power consumption targets. But estimating an algorithm's processing load can be difficult if the algorithm has not already been carefully mapped onto the target Read more...

BDTI Evaluates Floating-Point DSP Performance and Energy Efficiency of Altera 28 nm FPGAs

Back in September 2011, an InsideDSP article described a just-published analysis conducted by BDTI and sponsored by Altera, evaluating the viability of implementing complex hardware-accelerated single-precision floating-point functions on FPGA fabric. As I wrote then: To date, FPGAs have been used almost exclusively for fixed-point digital signal processing functions. Although FPGA vendors have long offered floating-point primitive libraries, the performance of FPGAs in floating-point Read more...

Tensilica's IVP: The Vision Processing Core Market Gets Another Entry

In a recent interview in EE Times, BDTI co-founder and president Jeff Bier commented: Multi-core CPUs are very powerful and programmable, but not very energy-efficient.  So if you have a battery-powered device that is going to be doing a lot of vision processing, you may be motivated to run your vision algorithms on a more specialized processor. Bier could have been speaking about CEVA's MM3101 processing core, which InsideDSP covered in its January 2012 edition. Or he could have been referring Read more...

QDSP6 V4: BDTI Benchmark Results and Implementation Details Of Qualcomm's DSP Core

The article, "QDSP6 V4: Qualcomm Gives Customers and Developers Programming Access to its DSP Core," which appeared in the June 2012 edition of InsideDSP, showcased Qualcomm’s decision to open up access to its DSP core via a software development kit. This decision corresponded with the release of the fourth version (V4) of the sixth generation (QDSP6, aka "Hexagon") of the company's proprietary DSP architecture, found in the company's 28 nm-based Snapdragon S4 SoCs. To be clear, this broadened Read more...