InsideDSP — In-depth analysis and opinion

Calypto's Catapult 8 HLS: C-Based Hardware Design Matures

High-level synthesis (HLS) is a trend that BDTI has been following for quite some time, beginning with its several-decade-old academic foundations. Most commercial high-level synthesis efforts have focused on C-based design (whether ANSI C, C++ or SystemC), with toolsets that provided for translation of functionality defined at the behavioral level into logic at the register transfer level (RTL). In 2010, BDTI published certified HLS tool evaluation results for AutoESL's AutoPilot and Synopsys Read more...

SequenceL Programming Language, Toolset Strive to Leverage Multi-Core Processor Potential

For decades, multiprocessor systems were rare and most developers never had to think about how to program them. This began to change roughly a decade ago. In the spring of 2005, both AMD (Athlon 64 X2) and Intel ("Smithfield") unveiled x86 CPUs with dual processor cores on a single die. More recently, not only has the number of both physical and virtual on-chip cores steadily grown, the multi-core trend has also expanded into mobile and embedded applications. As multiprocessor chips become more Read more...

Jeff Bier’s Impulse Response—Garbage In, Garbage Out

The phrase "garbage in, garbage out" is usually associated with writing and using computer programs. In fact, the concept originated with Charles Babbage, inventor of the first computer. Amusingly, Babbage wrote: On two occasions I have been asked, 'Pray, Mr. Babbage, if you put into the machine wrong figures, will the right answers come out?'...I am not able rightly to apprehend the kind of confusion of ideas that could provoke such a question. The concept of "garbage in, garbage out" applies Read more...

Case Study: Cool Algorithm, But Will It Fit in My Product?

Algorithms are the essence of digital signal processing; they are the mathematical "recipes" that transform signals in useful ways. Companies developing new algorithms, or considering purchasing or licensing algorithms, often need to assess whether an algorithm will fit within their processing budget—and thereby within their cost and power consumption targets. But estimating an algorithm's processing load can be difficult if the algorithm has not already been carefully mapped onto the target Read more...

HP, PayPal Give ARM-plus-DSP Chip a (Moon)Shot

The December 2012 edition of InsideDSP included the article "Texas Instruments' Latest KeyStone II SoCs: Is A Special-Purpose Server Strategy Feasible?," which discussed TI's 66AK2Hx SoCs for specialized server applications. Based on the company's KeyStone II architecture, 66AK2Hx chips include the same ARM Cortex-A15 cores (one, two or four per chip) plus C66x DSP cores (zero, one, four or eight) as other KeyStone II family devices such as the cellular base station-tailored C6636 introduced Read more...

New Chips Expand Automotive Safety Capabilities

Smartphones and tablets may hog the limelight, but advanced driver assistance systems (ADAS) represent another hot technology sector. Market analysis firm Strategy Analytics, for example, expects that by 2021, automotive OEMs will be spending in excess of $25 billion per year on a diversity of assistance and safety solutions (Figure 1). Embedded vision is a critical element of ADAS designs, some of which use vision alone, while others combine vision with radar, LiDAR, infrared, ultrasound, or Read more...

Jeff Bier’s Impulse Response—"We're Number One!"

My colleagues and I at BDTI recently completed a project to help a chip company select a licensable processor core to perform computer vision functions in a new SoC design. In the process, we learned many things about these processors. But, more interesting to me, we also learned something about human nature. A typical general-purpose embedded processor chip is used by hundreds or thousands of customers, so suppliers find it necessary to make detailed information about these chips readily Read more...

Case Study: BDTI-Developed, QDSP6-Optimized Audio Algorithms Deliver the Sweet Sounds of Success

Qualcomm recently opened up the QDSP6 (aka "Hexagon") DSP core in its Snapdragon SoCs to programming access by its customers and software developer partners. Multimedia applications, for example, can benefit from leveraging QDSP6 processing resources, boosting overall performance, minimizing overall power consumption, and freeing up the CPU to tackle other tasks. And mobile application processors such as Snapdragon are increasingly finding use in a diversity of embedded applications beyond the Read more...

ON Semiconductor's Hearing Aid SoCs: Distributed Performance That's Easy on Batteries

The hearing aid is a challenging digital signal processing application. The amount of processing horsepower required is formidable, both to filter out ambient noise and to amplify and otherwise enhance sounds that are of importance, and especially considering that the signal processing chain must be traversed within a few milliseconds in order that the user doesn't perceive lip sync loss or other visual-to-audible delays. But long battery life is equally essential; no hearing aid owner wants to Read more...

Jeff Bier’s Impulse Response—Is That a Computer in Your Camera?

One of the things I find endlessly fascinating about digital signal processing is that it enables using computation to offset physical limitations. For example, with the right signal processing, you can get awesome sound out of tiny, inexpensive loudspeakers, like those that fit into a smartphone or tablet. It turns out that this also applies to photography. Virtually all digital cameras today do some algorithmic processing to improve the quality of captured images. And the amount and Read more...