With the MM3101, launched at the January 2012 Consumer Electronics Show, silicon IP supplier CEVA for the first time provided a processor core with instructions and other features specifically tailored for computer vision algorithms. (The precursor MM2000 and MM3000 were focused predominantly on encoding and decoding images and video). Later, the company released a super-resolution algorithm for computational photography, along with a software framework that enables Android applications to
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In many applications of digital signal processing – such as speech recognition and computer vision – the essential objective is to distinguish objects of interest, such as words or faces. This can be very challenging in real-world situations where objects of interest are distorted (e.g., a person is speaking with an accent, or a face is turned at an angle from the camera) or obscured (for example, a voice is competing with background noise, or a face is partially covered by a hand).
Over the
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Portable electronics devices are incorporating increasingly sophisticated multimedia capabilities, while at the same time striving to meet tough size, weight, battery life and cost requirements. Recently, a BDTI client launched a design for a new portable multimedia system requiring billions of floating-point operations per second and low input-to-output latency, and single-digit power consumption to enable compact and fan-less system operation. Robust software development tools were also a key
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At January's CES (Consumer Electronics Show), Cadence showed that has picked up the baton and continued the pace of acquired company Tensilica by announcing the eleventh generation of the Xtensa configurable processor architecture. First unveiled in 1999, Xtensa has received evolutionary advancements on a roughly two year cycle since that time; in late 2013, for example, InsideDSP covered the Xtensa 10 product release. At the time, Cadence had also unveiled the fifth generation of its LX
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Massively parallel processor supplier Tilera is a company that InsideDSP has kept an eye on for nearly a decade now, stretching back to BDTI's benchmarking of the company's first-generation TILE architecture in its 64-core form (see sidebar "Company, Architecture and Product Line Background"). After an initial flurry of product releases, privately held Tilera grew uncharacteristically quiet over the next half-decade, focusing on rolling out the remainder of the TILE-Gx family, conserving its
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If you frequently travel across many time zones, you've probably had the unsettling experience of waking at an odd hour and being uncertain about where exactly you are. If you're like me, your instinctive solution to this confusion is to turn on a light and look around. Instantly, you recognize that you're in a hotel room. A few more visual clues (sometimes requiring a peek through the window) and suddenly you know where you are.
And although it's largely a subconscious process, looking around
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As applications become more complex, and processors become more powerful, system developers increasingly rely on off-the-shelf software components to enable rapid and efficient application development. This is particularly true in digital signal processing, where application developers expect to have access to libraries of optimized building-block functions to speed their work.
A leading SoC developer recently contracted BDTI to assist it in developing a comprehensive library of software
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Longtime readers of this column will know that I've been predicting the proliferation of visual intelligence in a wide range of products – including consumer electronics – for a few years now. Over that time, there have been a few high-profile successes of vision in consumer electronics. For example, the first-generation Microsoft Kinect, while not a hit with serious gamers, sold tens of million units and enabled many casual users to enjoy console gaming for the first time. There have also been
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Emerging and evolving options for high-level design of FPGAs is a topic of ongoing interest at InsideDSP. Recently, for example, BDTI covered the latest version of Calypto's Catapult C-based design environment. Similarly, in August 2012 InsideDSP discussed the C-based high-level synthesis (HLS) facilities that Xilinx bundled in some versions of its Vivado FPGA design toolset. And less than a year ago, BDTI analyzed a different approach to high-level synthesis, based on the Khronos Group's
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Remember that childhood game where you try to decide which famous person--or which book, or whatever--you'd like to have with you, if you were to be stranded on a desert island?
Well, choosing a processor is kind of like that. Except that, with a processor, it's not a game. Once you've chosen a processor, and designed your hardware and software around that processor, it becomes very expensive--and very time-consuming--to switch to another processor. So, you're likely to be stuck with whatever
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