The cellular base station and its associated infrastructure topology have remained largely unchanged throughout the industry's history to date, although upgrades have periodically occurred to address the needs of evolving voice and data standards. Within each base station are beefy application-tailored, highly integrated DSPs from companies such as CEVA, Freescale, LSI, and Texas Instruments, all of which are regularly covered in InsideDSP. A beefy “backhaul” tether connects each base station
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Vision science studies suggest that the eye is able to discern more than 11 bits of dynamic range for each of the three primary colors – red, green and blue – that typically comprise a given scene. The optical nerve connecting each eye to the brain, on the other hand, is only able to pass roughly five bits' (40 levels) worth of each primary color's data. Yet the brain still is capable of discerning more than 10 billion discrete levels of total color depth, equivalent to that of the 11-bit-per-
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In my December column, I observed that smartphones and tablets are starting to be used in places where purpose-built embedded systems once reigned, such as point-of sale terminals. At home, for example, I have a small Android tablet that I use as an Internet audio player. And my local sandwich shop uses iPads as self-service ordering and payment terminals.
When I first began thinking about this phenomenon approximately a year ago, I thought it was an interesting trend that might someday become
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Algorithms are the essence of digital signal processing; they are the mathematical "recipes" that transform signals in useful ways. Companies developing new algorithms, or considering purchasing or licensing algorithms, often need to assess whether an algorithm will fit within their processing budget—and thereby within their cost and power consumption targets.
But estimating an algorithm's processing load can be difficult if the algorithm has not already been carefully mapped onto the target
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In a recent interview in EE Times, BDTI co-founder and president Jeff Bier commented:
Multi-core CPUs are very powerful and programmable, but not very energy-efficient. So if you have a battery-powered device that is going to be doing a lot of vision processing, you may be motivated to run your vision algorithms on a more specialized processor.
Bier could have been speaking about CEVA's MM3101 processing core, which InsideDSP covered in its January 2012 edition. Or he could have been referring
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Qualcomm recently opened up the QDSP6 (aka "Hexagon") DSP core in its Snapdragon SoCs to programming access by its customers and software developer partners. Multimedia applications, for example, can benefit from leveraging QDSP6 processing resources, boosting overall performance, minimizing overall power consumption, and freeing up the CPU to tackle other tasks. And mobile application processors such as Snapdragon are increasingly finding use in a diversity of embedded applications beyond the
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The October issue of IEEE Spectrum Magazine includes an interesting article titled "Could Supercomputing Turn to Signal Processors (Again)?" which discusses the viability of developing supercomputers using digital signal processors. It covers, among other things, a recent analysis project co-staffed by engineers at Texas Instruments and researchers at the University of Texas, Austin, to compare the floating-point operation-per-watt capabilities of TI's DSPs against those of other and now-more-
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Semiconductor memory is increasing in capacity and cost-effectiveness all the time. Yet, there are plenty of deeply embedded applications for which every spare byte of RAM or flash memory is a precious commodity, especially those leveraging memory integrated onto an SOC of processor, rather than external discrete memory. Throw in a performance-constrained processor (intentionally speed-limited to minimize power consumption), a small battery, and a multi-day battery life requirement, and you've
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The prodigious transistor budgets delivered by modern semiconductor processes enable designers to create powerful processor cores and chips. However, this silicon potential will be for naught if it can't easily be harnessed by algorithm developers. Consider the non-trivial die area and development time consumed by a processor core, along with the notable competitive differentiation that can be accrued by its effective utilization. Clearly, the ease by which coders can gain robust access to
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Analog Devices becomes the latest semiconductor manufacturer to standardize on the increasingly pervasive Eclipse open-source IDE (integrated development environment) and extensible plug-in system with the CrossCore Embedded Studio software suite for C++ and assembly language-based software development, which the company officially unveiled last month at the DESIGN East conference. Particularly attentive readers may recall that this isn't the first time we've heard about CCES (CrossCore
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