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- CEVA Second-generation Deep Learning Toolset Supports Additional Frameworks and Topologies
- Case Study: How to Implement Deep Learning for Vision on Embedded Processors
- New Synopsys Processor Core Targets Traditional- and Deep Learning-based Embedded Vision
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Picochip and Mindspeed: Former Competitors Unite to Address Wireless Spectrum Needs
The dearth of available wireless spectrum throughout the world, notably in the United States, is one of technology's hottest topics. It's driving network management policies such as bandwidth throttling, data usage caps, and blocks of particular ports, protocols and services, any or all of which (depending on which side of the debate you're on) are overdue and necessary, or overly heavy-handed and fiscally motivated. It's prompting the FCC to prod terrestrial television broadcasters into auctioning off unused spectrum, as well as moving into more cluttered areas of the VHF and UHF bands, in order to free up more (and larger-apportioned) spectral real estate for other uses.
The spectrum shortage is also causing no shortage of controversy as an upstart wireless broadband supplier, LightSquared, attempts to simultaneously shoehorn into a frequency footprint adjacent to legacy GPS broadcast bands and to point the blame finger at GPS developers for any resultant interference. And it's encouraging all sorts of acquisitions, some successful and others not, such as AT&T's failed bid for T-Mobile USA (and its now-rumored interest in DISH Networks and others), along with Verizon's not-yet-finalized purchase of spectrum from Comcast and other members of SpectrumCo LLC.
The root reason for these additional-spectrum aspirations will be familiar to any of you who own smartphones: it's the abundance of emails you send and receive, the web browsing you regularly accomplish, the apps and maps you download, the movies and other videos you watch, and the photos you snap and archive to various online storage and sharing sites. And although successive iterations and generations of cellular data technologies have boosted both per-connection bandwidth and the number of simultaneous connections handled by a given piece of hardware, thanks to enhancements in frequency division, modulation and coding schemes, anyone in a densely populated environment (such as, say, Las Vegas's early-January Consumer Electronics Show) can attest that the result is still far from robust.
Key to solving this dilemma, particularly given that latest-generation protocol performance is approaching the Shannon-defined limit, is to evolve the network beyond a few large cellular base stations each servicing a large area to a hierarchical approach dominated by more numerous, albeit smaller-footprint cells. Doing so makes the network more complicated, because of the consequent need for inter-cell interference containment, and because smooth cell-to-cell handoffs with no perceptible reliability or performance impact are necessary to address the expectations of inherently mobile owners of handsets, tablets, laptops and the like. But a finer-grained and more intelligent cell topology, coupled with continued increases in the number of per-cell simultaneous connections, can enable the aggregate network to support many more users than before. And it also keeps the data on high bandwidth wired connections (copper, coax, fiber, etc) for a higher percentage of the overall transmission span, versus lingering on lower-bandwidth wireless spans.
The fiscal upside potential of a cellular network transition to more-and-smaller nodes was the fundamental impetus for Mindspeed Technologies' recent acquisition of Picochip, announced in early January and finalized one month later. According to Rupert Baines, formerly VP of Marketing of Picochip and now handling that same role for the merged entity, Picochip had achieved a greater than 70% share of 3G/HSPA femtocell deployments (including the AT&T 3G Microcell that I personally own and greatly appreciate), but as a small private company it was unable to effectively break into the market for larger-capacity cellular enterprise, public access and macrocell designs (Figure 1). Baines also admitted the company was late to market with a 4G LTE offering. Conversely, publicly traded Mindspeed had developed robust high-end LTE products but didn't see a clear path to migrating down to lower-end cell designs, and the company also needed access to legacy 3G cellular data technology in order to support existing mobile devices.
Figure 1. The combination of Mindspeed and Picochip is capable of servicing many more cellular base station configurations than either company was individually able to tackle.
The first fruits of the Mindspeed/Picochip merger are evident in the company's newly introduced Transcede T22xx series of SoCs for residential, small office/home office (SOHO) and small enterprise cell applications, along with the Transcede T33xx series devices for enterprise, metro and picocells. Baines freely admits that Picochip had little influence on the chips' silicon designs, which were already well underway when the two companies began exploring various alliance possibilities. However, at the time Picochip was already seriously evaluating a DSP migration from its own picoArray architecture to CEVA's cores, and as such has already been able to heavily contribute to the Transcede T22xx and T33xx firmware development efforts.
Transcede T22xx-series SoCs contain three primary processing blocks (Figure 2):
- A dual-core ARM Cortex-A9 cluster, running at 1 GHz and integrating a NEON fixed/floating point SIMD unit
- Two CEVA-XC323 cores, also operating at 1 GHz, each consisting of a vector DSP core and a SIMD vector unit, and with an 8-issue VLIW instruction set that delivers up to 8 GIPS per core, and
- Four MAP4 (Mindspeed Application DSP) cores, each core containing four SIMD vector units (with each unit capable of 1 GMAC/sec performance for 24x16 array math), and a fine-grain VLIW instruction set that delivers 0.8 GIPS peak speed per core.
These blocks connect to each other, as well as to numerous special-function cores, via a combination of AXI (advanced extensible interface) and AHB (advanced high performance bus) AMBA interconnect fabric.
Figure 2. Mindspeed's Transcede T22xx series integrates three main processing engine types (a), whose amounts are doubled in the T33xx family (b). Concurrent 3G and 4G algorithm processing can occur on dedicated on-chip resources in the high-end devices (c), while they contend for the same processor cores' attention on lower-end SoCs.
Dedicated-function cores include various FEC (forward error correction) function blocks, along with a chip-rate processing correlator for WCDMA, and several security protocol accelerators. I/O bus options comprehend dual JESD207 radio interfaces (CMOS and LVDS), single- and quad-lane PCI Express clusters, both serial and reduced gigabit media independent interfaces (SGMII and RGMII), USIM (universal subscriber identity module), and a diversity of general-purpose ports; USB, UART, JTAG, I2C, SPI and multiple GPIOs.
Take the Transcede T22xx series, double the number of ARM Cortex-A9 cores, CEVA-XC323 cores and MAP4 cores (befitting beefier processing requirements in the targeted larger-cell applications), and you have Mindspeed's new Transcede T33xx series. One possible software partitioning model tasks two of the ARM cores to 3G protocol processing, with the other two cores devoted to 4G algorithms. Respective TCB (transaction control block) operations execute on associated pairs of CEVA DSP cores. Conversely, on the Transcede T22xx series, 3G and 4G functions share the same processing resources; while they can operate concurrently, they do so with reduced workload capabilities as compared to their counterparts running on the higher-end Transcede T33xx SoCs.
The company reports that it has functional silicon in hand for both product families, which it plans to sample to key customers shortly. However, as Baines suggests, "Getting carrier-grade 3G code onto the T2200 is a task. Porting our existing 3G code base, going through our regression tests, validation and verification, and then carrier acceptance takes quite a long time." Even further out in the schedule are LTE Advanced (Release 10 and 11) firmware development and qualification, although Baines is confident that today's silicon is inherently capable of supporting the next-generation LTE flavors. As a near-term bridge strategy, therefore, the company has developed the Transcede T2150, a MCM (multi-chip module) combining the Transcede T2100 LTE processor and Picochip PC323 3G cellular device.
Notes Baines, "We have carrier-grade code for 3G and for LTE today, so we want to minimize the pain and accelerate the adoption of it. The 3G code on the PC30xx is already carrier-proven, and the LTE code is a direct port from the current Transcede to the T2200; those are low risk and can be deployed immediately." Since the Transcede T2150 and T2200 share the same PHY APIs, Mindspeed's customers are able to re-use their existing software stacks in later migrating from the MCM to the dual-mode SoC. And as is, the T2150 can implement a robustly featured NodeB (or evolved i.e. eNB in the case of LTE) small cell.
Cooper’s Law (coined by the leader of the team that developed the first handheld mobile phone at Motorola) explains why increasing the number of cells has always been the main means of adding network capacity. And an expansion beyond simply being concerned about coverage to also focusing on capacity is behind the cell network evolution from a macro topology of few large cells to a hierarchical topology spanning multiple cell sizes and proportional amounts. As the Transcede T22xx and T33xx exemplify, the merged Mindspeed-plus-Picochip entity is positioned to supply a diversity of cell configurations within that hierarchical topology.