- Next-generation Cadence Tensilica Fusion DSP Core Expands Capabilities, Aspirations
- CEVA Second-generation Deep Learning Toolset Supports Additional Frameworks and Topologies
- Case Study: How to Implement Deep Learning for Vision on Embedded Processors
- New Synopsys Processor Core Targets Traditional- and Deep Learning-based Embedded Vision
- HSA Foundation Aims for Broader Adoption of Coherent Memory Standard for Heterogeneous Processors
Analog Devices Lowers Entry Point for DSP-Enabled Processors
Analog Devices (ADI) has expanded its Blackfin family of DSP-centric embedded processors with a new low-cost family member, the ADSP-BF592. The processor delivers a respectable 800 MMACS (million multiply accumulate cycles per second) for around $3. The trend is clear: ever-tinier processors can take on demanding DSP applications in segments ranging from consumer electronics to medical to automotive.
To enable its low price, ADI has trimmed the features of the BF592 compared to other Blackfin family members. Most notably, the BF592 doesn't support external memory (except for a serial link to flash memory). The chip integrates a modest 36 Kbytes of SRAM for data and 32 Kbytes for programs. There is also a 4 Kbyte boot ROM and a 64 Kbyte program ROM that contains ADI’s VDK real-time operating system and C language runtime libraries.
Like the memory system, the complement of on-chip peripherals is basic: The BF592 includes a 32-bit core timer and three 32-bit general-purpose timers. There are two SPORT (serial port) interfaces that can implement a range of serial protocols such as SPI and I2C. The BF592 also integrates two dedicated SPI ports and a 16-bit parallel peripheral interface that can connect to devices such as LCDs and CMOS sensors.
In addition to contributing to the chip’s low cost, the modest complement of on-chip peripherals and the lack of external memory interface helps the chip achieve the smallest footprint among the Blackfin family, measuring 9x9 mm with just 64 pins. In comparison, the next smallest member, the BF504, has 88 pins; most other family members have more than 100 pins, and some have 400 pins. According to ADI, active power is a miserly 88 mW at 300 MHz, and standby power is under 1 mW.
Taking a closer look at performance, on the BDTI DSP Kernel Benchmarks™, the BF592 achieves a BDTImark2000™ score of 2240. (The BDTImark2000 provides a summary metric of digital signal processing application performance. For more information and benchmark scores, see /Resources/BenchmarkResults.) While far below the DSP performance of today’s highest performing processors, this is ample DSP performance for a wide range of tasks in fields such as audio, speech, instrumentation, feedback control, and wireless communications. And the BF592’s performance/cost ratio is noteworthy: it achieves a BDTImark2000/$ score of 746. This is the highest performance/cost score recorded by BDTI, and is roughly twice the BDTImark2000/$ score of the Texas Instruments ‘C55x family.
For applications that can squeeze into the BF592’s modest memory and I/O envelope, the chip offers very attractive DSP cost-performance. It will be interesting to see what sorts of new system products and new features are enabled by the BF592.