
BDTI’s Pocket Guide
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BDTI’s Pocket Guide
to Processing Engines for Embedded Applications

BDTI’s Pocket Guide, the independent guide to processing engines for embedded applications, contains key specifications and independent benchmark results for the most popular processing devices used in embedded applications—including DSP processors, CPUs, microcontrollers, and FPGAs.

Results on the BDTI DSP Kernel Benchmarks™ are shown for chips from Analog Devices (ADI), Freescale, Microchip, Renesas, and Texas Instruments (TI), as well as for cores from ARC, ARM, CEVA, MIPS, NXP, Tensilica, Toshiba and Verisilicon.

The Pocket Guide also indicates available results on other BDTI Benchmark suites, including the BDTI Video Encoder/Decoder Benchmarks™, the BDTI Communications Benchmark (OFDM)™, and the BDTI Solution Benchmark™ for H.264 Decoders.

To have a copy of BDTI’s Pocket Guide to Processing Engines for Embedded Applications sent to you by mail, register for BDTI information and check the “Send me a Pocket Guide” box.

For more information about these processing engines or to get your FPGA, microcontroller, CPU, SoC, or DSP processor added to the Pocket Guide, email info@BDTI.com.

Updated April 2009

CHIPS
Vendor	Family	Floating, Fixed, or Both	Data Width	Core Clock Speed [1]	BDTImark2000™ BDTIsimMark2000™ [2]	BDTImemMark2000™ [3]	Other BDTI Benchmark™ Scores available	Total On-Chip Memory, Bytes	Unit Price [4]	Notes
Analog Devices	ADSP-218x	Fixed point	16 bits	80 MHz	240	65		8 K–104 K	$6–27	Many family members w/ assorted peripherals
	ADSP-219x	Fixed point	16 bits	160 MHz	410	63		8 K–64 K	$12–30	Enhanced version of the ADSP-218x
	ADSP-2126x (SHARC)	Floating point	32/40 bits	200 MHz	1090	34		512 K–768 K	$6–20	Features SIMD, strong multiprocessor support
	ADSP-213xx (SHARC)	Floating point	32/40 bits	400 MHz	2050	34		384 K–1024 K	$8–40	SHARC with a lengthened pipeline for higher clock speeds
	ADSP-BF5xx (Blackfin)	Fixed point	16 bits	750 MHz	4190 [5,6]	72 [5,6]		52 K–308 K	$5–32	Dual-MAC DSP with variable speed and voltage
	ADSP-TS20x (TigerSHARC)	Both	8/16/32/40 bits	600 MHz	6400 [6]	52 [6]		512 K–3 M	$133–207	4-way VLIW with SIMD capabilities; uses eDRAM
Freescale	DSP563xx	Fixed point	24 bits	275 MHz	820	50		24 K–648 K	n/a	Many audio-oriented parts; binary-compatible with ’560xx
	DSP56F8xx (56800)	Fixed point	16 bits	80 MHz [7]	110	78		28 K–152 K	n/a	Contains many microcontroller-like features
	DSP5685x/ 56F8xxx (56800E)	Fixed point	16 bits	120 MHz	340	79		20 K–612 K	n/a	Enhanced version of the ’568xx
	MSC71xx (SC1400)	Fixed point	16 bits	300 MHz	3370	67		408 K–472 K	$32–38	Based on SC1400 licensable core
	MSC81xx (SC140)	Fixed point	16 bits	500 MHz	5610 [5]	67 [5]		514 K–1440 K	$55–122	Based on SC1400-compatible core; most chips use 4 cores
	MSC81xx (SC3400)	Fixed point	16 bits	1 GHz	11900 [5]	67 [5]	OFDM	11.2 M	$123–156	Based on SC3400 core; quad-core chip
Microchip	dsPIC3xF	Fixed point	16 bits	40 MHz	130	78		13 K–287 K	$2–7	Hybrid microcontroller/DSP
NXP	TriMedia 3270 core	Both	8/16/32 bits	350 MHz	n/a	n/a	Video Encoder and Decoder Benchmarks	16 M	n/a	VLIW media processor with SIMD capabilities
picoChip	PC102	Fixed Point	16 bits	160 MHz	n/a	n/a	OFDM	1 M	$99	Massively parallel chip with 344 processors
Renesas	SH77xx (SH-4)	Both	16/32 bits	400 MHz	1250	50		48 K–304 K	$18–32	Superscalar microprocessor with 3D geometry instructions
Sandbridge	SB3500	Fixed point	16 bits	500 MHz	n/a	n/a	OFDM	928 K	n/a	Three 4-way multithreaded with 16-way SIMD unit DSP’s and one ARM9E
Texas Instruments	TMS320C28x/ F28x	Fixed point	32 bits	150 MHz	n/a	n/a		40 K–326 K	$3–16 [11]	Hybrid microcontroller/DSP; assembly-compatible w/ ’C24x
	TMS320F283xx	Floating point	32 bits	300 MHz	n/a	n/a		182 K–582 K	$12–15	Adds floating-point unit to 'C28x
	TMS320C54x	Fixed point	16 bits	160 MHz	500 [5]	64 [5]		20 K–272 K	$3–24	Many specialized instructions
	TMS320C55x	Fixed point	16 bits	300 MHz	1460	75		80 K–376 K	$4–15	Dual-issue, dual-MAC DSP; assembly-compatible w/ ’C54x
	TMS320C64x/ DM64x	Fixed point	8/16 bits	1 GHz	9130	54	OFDM	128 K–1032 K	$9–182	Adds quad-MAC capabilities and specialized operations to 'C62x
	TMS320DM6446	Fixed point	8/16 bits	600 MHz	6590	60	H.264 Sol. Benchmark	240 K	$32	ARM9, C64x+ and video accelerator (BDTImark2000 for C64x+ only)
	‘C64x+	Fixed point	8/16 bits	1.2 GHz	13170	60	OFDM	128 K–60 M	$10–191	Adds 8-MAC capabilities and specialized operations to 'C64x
	TMS320C67x	Floating point	32 bits	300 MHz	1500	35		72 K–264 K	$12–28	Floating-point version of ’C62x
	TMS320C67x+	Floating point	32 bits	300 MHz	n/a	n/a		480 K–672 K	$6–25	Adds registers and audio-oriented instructions to the ’C67x
	OMAP35x	Fixed point	8/16/32 bits	600 MHz	4540	78		320 K	$20–37	Metrics for ARM Cortex-A8 core only (optional 'C64x+ DSP available)
Tilera	TILE64	Fixed point	8/16 bits	866 MHz	n/a	n/a	OFDM	5120 K	$896[11]	64 core chip, 3-way VLIW with SIMD capabilities
VeriSilicon	VSI40x (ZSP400)	Fixed point	16/32 bits	200 MHz	940	74		96 K–252 K	n/a	Based on ZSP400 licensable core (see below)

CORES
Licensor	Family	Floating, Fixed, or Both	Data Width	Core Clock Speed [1,8]	BDTImark2000™ BDTIsimMark2000™ [2]	BDTImemMark2000™ [3]	Additional BDTI Benchmark™ Scores available	Total Core Memory Space, Bytes	Die area [8]	Notes
ARC	ARC 600/ ARC XY	Fixed point	16/32 bits [9]	180 MHz [10]	n/a	n/a		4 G	0.77 mm² [10]	Customizable core with optional DSP features
	ARC 700/ ARC XY	Fixed point	16/32 bits [9]	265 MHz [10]	n/a	n/a		4 G	1.1 mm² [10]	Longer pipeline enables higher clock rate
	AV 401V	Fixed-point	16/32 bits	n/a	n/a	n/a	H.264 Sol. Benchmark	4 G	n/a	Licensable video subsystem based on ARC 700 plus accelerators
ARM	ARM7	Fixed point	32 bits	145 MHz	160	57		4 G	0.28 mm²	Widely licensed 32-bit microprocessor core
	ARM9	Fixed point	32 bits	255 MHz	320	74		4 G	n/a	Adds separate bus for data access, deeper pipeline to ARM7
	ARM9E	Fixed point	16/32 bits	265 MHz	550	72		4 G	1.7 mm²	ARM9 enhanced with single-cycle MAC unit
	ARM1136	Fixed point	16/32 bits	330 MHz	1160	72		4 G	2.3 mm²	Adds SIMD, load/store unit, branch prediction, deeper pipeline
	ARM1176	Fixed-point	16/32 bits	335 MHz	1200	72	Video Encoder and Decoder Benchmarks	4 G	2.5 mm²	Very similar to ARM1136
	Cortex-A8	Fixed-point	8/16/32 bits	n/a [12]	7.6 per MHz	78	Video Encoder and Decoder Benchmarks	4 G	n/a [12]	Dual-issue superscalar architecture with NEON DSP extensions
	Cortex-R4	Fixed-point	16/32 bits	n/a [12]	3.8 per MHz	73		4 G	n/a [12]	Dual-issue superscalar architecture, software compatible with ARM9E
CEVA	CEVA-TeakLite	Fixed point	16 bits	170 MHz	n/a	n/a		256 K	0.4 mm²	Single-MAC, single-issue DSP core
	CEVA-TeakLite II	Fixed point	16 bits	200 MHz	n/a	n/a		4 M	0.5 mm²	Faster version of CEVA-TeakLite
	CEVA-TeakLite III	Fixed point	16/32 bits	550 MHz	n/a	n/a		4 G	n/a [12]	Dual-MAC DSP core; backward compatible with TeakLite II
	CEVA-Teak	Fixed point	16 bits	150 MHz	n/a	n/a		8 M	0.9 mm²	Dual-MAC DSP core
	CEVA-X1620	Fixed point	8/16 bits	330 MHz	2660	67		4 G	2.6 mm²	8-way VLIW, dual-MAC DSP core
	CEVA-X1641	Fixed point	8/16 bits	600 MHz	n/a	n/a		4 G	n/a [12]	8-way VLIW, quad-MAC DSP core supporting SIMD operations
MIPS	MIPS32 24KE (with DSP ASE)	Fixed point	16/32 bits	335 MHz	1000	73		4 G	2.0 mm²	MIPS core with SIMD DSP extensions
NXP	CoolFlux DSP	Fixed point	24 bits	175 MHz	n/a	n/a		640 K	0.34 mm²	Dual-MAC core targets low-power audio applications
Tensilica	Diamond 545CK	Fixed point	18 bits [9]	245 MHz	4070	69		4 G	5.49 mm²	VLIW-based customizable core; with optional DSP features
Toshiba	Venezia (MeP + IVC2)	Fixed point	8/16/32 bits	n/a [12]	7.9 per Mhz	69		4 G	n/a [12]	MeP core: 32-bit RISC; IVC2 coprocessor: 64-bit SIMD
VeriSilicon	ZSPneo	Fixed point	16/32 bits	165 MHz	n/a	n/a		256 K	0.45 mm²	Single-MAC, scalar variant of the ZSP400
	ZSP200	Fixed point	16/32 bits	165 MHz	n/a	n/a		256 K	0.7 mm²	Single-MAC, 2-way superscalar variant of the ZSP400
	ZSP400	Fixed point	16/32 bits	165 MHz	780	74		256 K	1.3 mm²	Dual-MAC, 4-way superscalar DSP core
	ZSP410	Fixed point	16/32 bits	185 MHz	870	74		4 G	1.4 mm²	Enhanced ZSP400 with instruction cache
	ZSP500	Fixed point	16/32 bits	205 MHz	1620	68		64 M	2.2 mm²	Second-generation ZSP; dual-MAC, 4-way superscalar
	ZSP540	Fixed point	16/32 bits	200 MHz	n/a	n/a		64 M	2.7 mm²	Quad-MAC, 4-way variant of the ZSP500
	ZSP600	Fixed point	16/32 bits	175 MHz	n/a	n/a		64 M	3.1 mm²	Quad-MAC, 6-way variant of the ZSP500

FPGAs
Vendor	Family	Speed Grade	BDTI Benchmark™ Score available	Unit Price [11]	Notes
Altera	Stratix II EP2S15F672C5	Slow speed grade	OFDM	$38 [11]	FPGA with hardwired DSP features, such as multipliers
Xilinx	Virtex-4 SX25-10FF668C	Slow speed grade	OFDM	$89 [11]	FPGA with hardwired DSP features, such as multipliers
Xilinx	Virtex-4 XC4VFX140-11FF1760C4006	Medium speed grade	OFDM	$1280 [11]	FPGA with hardwired DSP features, such as multipliers

NOTES:

[1] Chips: clock speed for fastest family member. Cores: worst-case clock speed.

[2] The BDTImark2000 and BDTIsimMark2000 provide summary measures of DSP speed, based on scores on the BDTI DSP Kernel Benchmarks™. Higher is faster. Both scores are calculated with the same formula, but BDTIsimMark2000 scores may use projected clock speeds. BDTImark2000 scores are shown in bold and BDTIsimMark2000 scores in italic. See www.BDTI.com/benchmarks.html for more information and scores.

[3] The BDTImemMark provides a summary measure of memory use in signal processing applications; higher is better. See www.BDTI.com/benchmarks.html for more information and scores.

[4] Unit prices based on vendors’ quotations for 10,000-unit orders as of the first quarter of 2009, except where noted.

[5] Score for one core. Some family members contain multiple cores. Details available from BDTI.

[6] Score does not apply to some family members, which use slightly different architectures. Details available from BDTI.

[7] The DSP56F8xx requires two clock cycles per instruction cycle.

[8] NXP CoolFlux DSP data is for a 0.13 µm NXP process. All other core data is for the TSMC CL013G process and ARM Artisan SAGE-X library.

[9] Native multiplier width(s). Users may add custom instructions that support other data widths.

[10] Assumes use of optional DSP extensions but no other optional features.

[11] Pricing is for qty 1K.

[12] BDTI does not have clock speed and silicon area for this processor based on BDTI’s standardized conditions for processor cores.

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BDTI’s Pocket Guideto Processing Engines for Embedded Applications

BDTI’s Pocket Guide
to Processing Engines for Embedded Applications