Inside the
Analog Devices/Intel
Micro Signal Architecture
A BDTI Technical Evaluation
Includes Analog Devices' first "Blackfin" product
The first independent, in-depth report to evaluate the ADI/Intel Micro Signal Architecture (MSA),
a low-power dual-MAC DSP core jointly developed by Analog Devices (ADI)
and Intel. This report provides a comprehensive qualitative analysis
of the processor's architecture and features, along with a complete quantitative
analysis based on results from BDTI's DSP benchmark suite. The performance of the MSA core
is compared to that of key competitors, with benchmark results analyzed
in terms of underlying architectural strengths and weaknesses. The report includes benchmark results and analysis
of ADI's first product based on the MSA, the "Blackfin" ADSP-21535.
Like all of the reports in the Inside series, Inside the ADI/Intel Micro Signal Architecture:
- Is based on hands-on programming experience
- Includes industry-standard BDTI Benchmark™ results
- Identifies processor strengths and weaknesses
- Compares performance to that of key competitors
- Provides timely information from the established leader in DSP technology
analysis
Report includes analysis of the MSA's:
- Architecture
- Data path
- Memory system
- Instruction set
- Address generation
- Execution control
- On-chip debugging support
- Benchmark performance
- Fabrication details
- Development tools
- Applications support
- Advantages
- Disadvantages
Table of Contents
- Introduction
- About the authors
- Qualitative analysis of the MSA and MSA-based products from ADI
- Overview of competitors
- Analog Devices ADSP-219x
- Texas Instruments TMS320C55xx
- StarCore SC140/Motorola MSC8101
- Motorola DSP5685x
- Analysis and comparison of benchmark results
- Conclusions
- Appendix: Contains complete BDTI Benchmark results for the MSA and competitors
Excerpts from BDTI's analysis:
Because the MSA's two data paths share input sources, SIMD
operands must be arranged in two input registers. If several
cycles are required to load and arrange data, it may be faster to
use only a single data path each cycle.
The MSA's add-on-sign and compare-select instructions are useful
for implementing Viterbi decoders. These instructions are quite
powerful; for example, the MSA's compare-select instruction
processes four samples at a time compared to two samples per
cycle for the equivalent TMS320C55xx instruction. Of the
competitors included in this report, the MSA has the
second-lowest cycle count on BDTI's Viterbi benchmark, with the
SC140 having the lowest cycle count.
Overall, the MSA has benchmark cycle counts that are
slightly lower than those of the Texas Instruments
TMS320C55xx. As a result, at a projected clock rate of 300 MHz,
the MSA will be about twice as fast overall as the 160 MHz
TMS320C55xx.
Sample benchmark results
Execution Time for BDTI's Real Block FIR Filter Benchmark
(lower is faster)
*The MSA results included in this report are preliminary and projected.
BDTI's Inside Series
Inside the ADI/Intel Micro Signal Architecture is one of many reports in BDTI's series of focused technical analyses of single processors. The series also includes:
The BDTI Benchmarks™
The analysis in Inside the ADI/Intel Micro Signal Architecture is based on the results
of the BDTI Benchmarks, an industry-standard suite of DSP algorithm kernels.
Each benchmark is painstakingly written and optimized in native assembly
language following a strict specification.
Pricing, Shipping, and Ordering Information
First copy: $1,500
Additional copies: $650 each
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To order Inside the ADI/Intel Micro Signal Architecture, download an order form in HTML or PDF, complete and return it to BDTI by mail or fax.
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