DSP on General-Purpose Processors
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DSP on General-Purpose Processors

Table of Contents

1. Introduction

  • Scope and Purpose
  • Organization

2. About the Authors

3. Digital Signal Processing and DSP Systems

3.1 Advantages of DSP

3.2 Characteristics of DSP Systems

  • Algorithms
  • Sample Rates
  • Clock Rates
  • Numeric Representations

3.3 Classes of DSP Applications

  • Low-Cost Embedded Systems
  • High-Performance Applications

4. DSP Implementation Options

4.1 DSP Processors

4.2 General-Purpose Processors

4.3 Processor Cores

4.4 Alternatives to Commercial Processors and Cores

5. Processor Characteristics Relevant to DSP

5.1 Execution Predictability

  • Caches
  • Branch Prediction
  • Dynamic Instruction Scheduling
  • Data-Dependent Execution Times
  • Operating Systems
  • Tools

5.2 Numeric Representations & Arithmetic

  • Fixed-Point vs. Floating-Point
  • Native Data Word Width
  • Extended Precision
  • Floating-Point Emulation and Block Floating-Point
  • IEEE-754 Floating-Point

5.3 Data Path

  • Integer Data Paths
  • Floating-Point Data Paths
  • Operands and Registers

5.4 Memory Architecture

  • Memory Bandwidth
  • Caches
  • Memory Structures
  • Reducing Memory Access Requirements
  • ROM
  • External Memory Interfaces
  • Virtual Memory

5.5 Addressing

  • Basic Addressing Modes
  • Accessing Data in DSP Applications
  • Addressing for DSP Applications

5.6 Instruction Set

  • Styles of Instruction Sets
  • Instruction Types
  • Registers
  • Orthogonality

5.7 Execution Control

  • Out-of-Order Execution
  • Branch Prediction
  • Hardware Looping
  • Interrupts
  • Stacks
  • Relative Branch Support

5.8 Pipelining and Superscalar Execution

  • Pipelining
  • Superscalar Execution

5.9 Peripherals

  • Serial Ports
  • Timers
  • Parallel Ports
  • Bit I/O Ports
  • On-Chip A/D and D/A Converters
  • External Interrupts

5.10 On-Chip Debugging Features

  • On-Chip Debugging Features
  • Performance Monitoring Features
  • Accessing On-Chip Debug Resources

5.11 Power Consumption & Management

  • Low-Voltage Operation
  • Power Management Features

5.12 Clocking

5.13 Price & Packaging

  • Example Prices
  • Packaging

5.14 Fabrication Details

  • Feature Size
  • Operating Voltage
  • Die Size
  • Processor Cores

5.15 Development Tools

  • Assembly Language Tools
  • High-Level Language Development Tools
  • Block-Diagram-Based Programming Tools
  • Real-Time Operating Systems

5.16 Applications Support

  • Manufacturer-Provided Documentation
  • Applications Engineers
  • Telephone Support
  • World-Wide Web
  • Training
  • Third-Party Support

6. Processor Analyses

6.1 Advanced RISC Machines ARM7TDMI

  • Introduction
  • Architecture
  • Instruction Set
  • Execution Control
  • Peripherals
  • On-Chip Debugging Support
  • Power Consumption & Management
  • Benchmark Performance
  • Cost
  • Fabrication Details
  • Development Tools
  • Applications Support
  • Advantages
  • Disadvantages

6.2 Hitachi SH-DSP

  • Introduction
  • Architecture
  • Instruction Set
  • Execution Control
  • Peripherals
  • On-Chip Debugging Support
  • Power Consumption & Management
  • Benchmark Performance
  • Cost
  • Fabrication Details
  • Development Tools
  • Applications Support
  • Advantages
  • Disadvantages

6.3 Integrated Device Technology R4650

  • Introduction
  • Architecture
  • Instruction Set
  • Execution Control
  • Peripherals
  • On-Chip Debugging Support
  • Power Consumption & Management
  • Estimated Benchmark Performance
  • Cost
  • Fabrication Details
  • Development Tools
  • Applications Support
  • Advantages
  • Disadvantages

6.4 Intel Pentium

  • Introduction
  • Architecture
  • Instruction Set
  • Execution Control
  • Peripherals
  • On-Chip Debugging Support
  • Power Consumption & Management
  • Benchmark Performance
  • Cost
  • Fabrication Details
  • Development Tools
  • Applications Support
  • Advantages
  • Disadvantages

6.5 Intel MMX Pentium Processor

  • Introduction
  • Architecture
  • Instruction Set
  • Execution Control
  • Peripherals
  • On-Chip Debugging Support
  • Power Consumption & Management
  • Estimated Benchmark Performance
  • Cost
  • Fabrication Details
  • Development Tools
  • Applications Support
  • Advantages
  • Disadvantages

6.6 Motorola/IBM PowerPC 604/604e

  • Introduction
  • Architecture
  • Instruction Set
  • Execution Control
  • Peripherals
  • On-Chip Debugging Support
  • Power Consumption & Management
  • Benchmark Performance
  • Cost
  • Fabrication Details
  • Development Tools
  • Applications Support
  • Advantages
  • Disadvantages
  • Example Dedicated DSP Processors
    • Introduction
    • Architecture
    • Instruction Set
    • Execution Control
    • Peripherals
    • On-Chip Debugging Support
    • Power Consumption & Management
    • Benchmark Performance
    • Cost
    • Fabrication Details
    • Development Tools
    • Applications Support
    • Advantages
    • Disadvantages

6.7 Analog Devices ADSP-2106x Family

  • Introduction
  • Architecture
  • Instruction Set
  • Execution Control
  • Peripherals
  • On-Chip Debugging Support
  • Power Consumption & Management
  • Benchmark Performance
  • Cost
  • Fabrication Details
  • Development Tools
  • Applications Support
  • Advantages
  • Disadvantages

6.8 Texas Instruments TMS320C54x Family

  • Introduction
  • Architecture
  • Instruction Set
  • Execution Control
  • Peripherals
  • On-Chip Debugging Support
  • Power Consumption & Management
  • Benchmark Performance
  • Cost
  • Fabrication Details
  • Development Tools
  • Applications Support
  • Advantages
  • Disadvantages

7. BDTI Benchmark(TM) Results

  • The Need for Benchmarks
  • Benchmarking Approaches
  • Benchmarking Limitations
  • Processors Benchmarked
  • Organization of Benchmarking Results
  • Benchmark Specifications and Methodology
  • Benchmarking Conditions, Assumptions, and Cautions
  • Notation

7.1 Benchmark Instruction Cycle Counts

  • Analysis of Results

7.2 Execution Times

  • Analysis of Results

7.3 Cost-Execution Time Products

  • Analysis of Results

7.4 Memory Usage Benchmarking

  • Analysis of Results

8. Conclusions

8.1 General-Purpose Processors Arrive on the DSP Scene

  • Cost/Performance
  • Power Consumption
  • Integration
  • Ease of Development
  • Execution Time Predictability
  • Pulling it All Together

8.2 Evaluating and Choosing Processors

8.3 Conclusion

  • Vendor Contact Information
  • References
  • Glossary
  • Index

This announcement contains advance information that is subject to change without notice. Copyright © 1997-2010 Berkeley Design Technology, Inc. All rights reserved.


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