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SH-4/ST40 and SH-5/ST50 Report Cover

Inside the Hitachi/STMicroelectronics
SH-4/ST40 and SH-5/ST50

A BDTI Technical Evaluation

The first independent, in-depth report to evaluate two processor cores developed jointly by Hitachi Semiconductor and STMicroelectronics. The Hitachi SH-4 and STMicroelectronics ST40 is a 32-bit floating-point superscalar architecture with 16-bit instructions targeting low-cost embedded applications. In contrast, the Hitachi SH-5 and STMicroelectronics ST50 is the companies’ new fifth-generation 64-bit RISC instruction set architecture, targeting media-intensive consumer applications.

This report provides a comprehensive qualitative analysis of the processors' architecture and features, along with a complete quantitative analysis based on results from BDTI's DSP benchmark suite. The performance of the SH-4/ST40 and SH-5/ST50 is compared to that of key competitors, with benchmark results analyzed in terms of underlying architectural strengths and weaknesses.

This report will be of value to systems and chip designers, hardware and software engineers, processor designers, engineering managers, and product marketing managers.

Like all of the reports in the Inside series, Inside the Hitachi/STMicroelectronics SH-4/ST40 and SH-5/ST50:

  • Is based on hands-on programming experience
  • Includes industry-standard BDTI Benchmark™ results
  • Identifies processor strengths and weaknesses
  • Compares performance to that of key competitors
  • Provides timely information from the established leader in DSP technology analysis

Report includes analysis of the following for the SH-4/ST40 and SH-5/ST50

  • Architecture
  • Data path
  • Memory system
  • Instruction set
  • Address generation
  • Execution control
  • On-chip debugging support
  • Benchmark performance
  • Fabrication details
  • Development tools
  • Applications support
  • Advantages
  • Disadvantages

Table of Contents

  1. Introduction
  2. About the authors
  3. Selecting and using processor cores
  4. Qualitative analysis of the SH-4/ST40
  5. Qualitative analysis of the SH-5/ST50
  6. Overview of competitors
    • Hitachi SH3-DSP
    • Motorola MSC8101 (StarCore SC140)
    • ARM ARM9E
    • ADI ADSP-2116x
    • TI TMS320C67xx
  7. Analysis and comparison of benchmark results
  8. Conclusions
  9. Appendix: contains complete BDTI Benchmark results for the SH-4/ST40, SH-5/ST50, and competitors

Excerpt from BDTI's analysis

[On the SH-4:] The SH-4 is a RISC microcontroller architecture that is designed for use in 3D graphics applications. Notably, this processor includes specialized instructions intended for 3D geometry calculations, and can perform four floating-point MACs in a single cycle using these instructions. This is an unusual level of MAC throughput for an embedded processor. However, unlike the DSP-extended SH-DSP and SH3-DSP, the SH-4 does not include many features commonly found on DSPs. Such features are often a convenience for DSP algorithm implementation, and their absence may render the SH-4 an unsuitable choice for certain applications.

[On the SH-5:] The multimedia SIMD operations offer a high level of parallelism, but over a fairly narrow range of operations. The SH-5 arithmetic throughput on operations such as 16-bit MACs is on par with highly parallel VLIW processors such as the Texas Instruments TMS320C64xx and StarCore SC140. The SH-5, however, doesnt have the flexibility that the VLIW processors have, as it cannot issue several different operations in one instruction.

Sample benchmark results

BDTI's Real Block FIR Filter Benchmark - Execution Time in microseconds
(lower is faster)


Inside the Hitachi/STMicroelectronics SH-4/ST40 and SH-5/ST50 includes 100 pages of benchmark data, in tables and graphs, showing results on each of the 12 BDTI Benchmarks for the SH-4/ST40, SH-5/ST50, and competitors.

BDTI's Inside Series

Inside the Hitachi/STMicroelectronics SH-4/ST40 and SH-5/ST50 is one of many volumes in BDTI's series of focused technical analyses of single processors. The series also includes:

Inside the CEVA CEVA-X1620 and CEVA-X1640
Inside the Intel PXA27x
Inside the StarCore SC1200 and 1400
Inside the LSI Logic ZSP500
Inside the Hitachi/STMicroelectronics SH4/ST40 and SH5/ST50
Inside the ARM ARM7, ARM9, and ARM9E
Inside the 3DSP SP5
Inside the Hitachi SH-DSP and SH3-DSP
Inside the Analog Devices/Intel MSA

The BDTI Benchmarks™

The analysis in Inside the Hitachi/STMicroelectronics SH-4/ST40 and SH-5/ST50 is based on the results of the BDTI Benchmarks, an industry-standard suite of DSP algorithm kernels. Each benchmark is painstakingly written and optimized in native assembly language following a strict specification.

Pricing, Shipping, and Ordering Information

First copy: $1,500
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