
Fixed-Point DSP Processors
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Texas Instruments TMS320C1x

The TMS320C1x family is Texas Instruments' first generation of DSP processors. The first family member, the TMS32010, was introduced in 1983 and was the first commercially successful programmable DSP (the "C" designation was added when Texas Instruments began using a CMOS fabrication process). The fastest members of the TMS320C1x family available as of March 1997 execute at up to 8.77 MIPS using a 5.0-volt supply, and 4.0 MIPS using a 3.3-volt supply. The TMS320C1x still finds use in low-cost automotive, industrial, and communications systems. Although the TMS320C1x is not competitive with modern DSPs, we include it here because of its historical importance.

The TMS320C1x has a 16-bit fixed-point data path for fractional and integer arithmetic. The data path consists of a 32-bit ALU, a single 32-bit accumulator, a 0- to 16-bit left barrel shifter, a 0-, 1-, or 4-bit left shifter for storing accumulator values to memory, and a 16x16->32-bit multiplier. No guard bits are available, nor can the processor shift the contents of the product register right before accumulation. Accumulator saturation can optionally be enabled via a special instruction. The 16x16->32-bit multiplier supports signed/signed multiplication and can perform a multiplication in one instruction cycle. The TMS320C1x lacks a single-cycle multiply-accumulate instruction; rather, separate multiply and add instructions are used, requiring two instruction cycles.

The TMS320C1x uses a classic Harvard architecture with separate program and data memories. TMS320C1x family members vary in the size of their on-chip RAM and ROM; most members provide a 256x16 RAM and a 4Kx16 ROM. One program fetch and one data memory read or write are possible per instruction cycle, resulting in a maximum data bandwidth of 8.77 16-bit Mwords/second on an 8.77 MIPS TMS320C16.

With the exception of the TMS320C17, TMS320C1x processors feature a 12-bit (16-bit on the TMS320C16) external program address bus and a 16-bit external program data bus for accessing up to 4 Kwords of external program memory (64 Kwords on the TMS320C16). The TMS320C17 does not provide an external memory interface. One external program access can be performed every instruction cycle, resulting in a maximum external memory bandwidth of 8.77 16-bit Mwords/second on an 8.77 MIPS TMS320C16. Data memory is not expandable off-chip.

The TMS320C1x family supports paged memory-direct and register-indirect addressing. Immediate data is also supported. The TMS320C1x has no direct support for bit-reversed or circular addressing.

The TMS320C1x does not support hardware looping.

As of March 1997, quantity 1,000 prices for TMS320C1x family members range from $4.60 to $19.37. For a complete evaluation of this processor, including BDTI Benchmark ™ results, contact BDTI.

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