Freescale MSC711x and MSC81xxThe MSC711x and MSC81xx are two binary-compatible families of fixed-point DSPs offered by Freescale. Freescale currently offers five chips in the MSC711x family and five chips in the MSC81xx family. The first of these chips, the MSC8101, was announced in September 1999 and includes a 300 MHz core and 512 Kbytes of on-chip memory. The MSC8101 targets infrastructure applications such as 3G wireless, modem banks, and IP telephony. The newer MSC8103 is a scaled-down, lower-cost, and pin-compatible version of the MSC8101. The MSC8101 and MSC8103 are currently shipping. The Freescale MSC8102 was announced in November 2000. This chip includes four cores and is available at 275 MHz. The MSC8102 targets multi-channel transcoding and packet telephony applications. The newer MSC8122 and MSC8126 are pin-compatible with the MSC8102. Like the MSC8102, they both contain four cores. However, unlike all previous MSC81xx family members, these chips are based on a newer 90-nanometer fabrication process and will be available at speeds reaching 500 MHz. In addition, the MSC8126 adds Viterbi and turbo coprocessors. The 400 MHz versions of the MSC8122 and MSC8126 are currently sampling. The five MSC711x family members were announced in April 2004. The MSC711x family targets low-cost applications such as low-end IP telephony applications. Each of the five family members includes a single 200 MHz core; the parts differ mainly in terms of on-chip memory. The five MSC711x family members are pin-compatible with one another. ArchitectureThe MSC711x is based on the StarCore SC1400 core. The MSC81xx is based on the older StarCore SC140 core, which is functionally equivalent to the SC1400 core. For a description of the SC1400 architecture, click here.PeripheralsMSC711x peripherals include a DMA controller, DDR memory interface, UART, I˛C interface, host port, and one to three 128-channel TDM serial ports. Some family members also include a 10/100 Mbits/second Ethernet interface.MSC8101 peripherals include an enhanced filter coprocessor, a Power PC bus interface, a programmable memory controller, a DMA controller, and a Communications Processor Module (CPM) that supports Ethernet, ATM, and other protocols. The CPM is a programmable protocol machine that uses a 32-bit RISC engine. The CPM supports a variety of interface protocols, including 155 Mbits/second ATM interface (including AAL 0/1/2/5), 10/100 Mbits/second Ethernet interface, up to four E1/T1 interfaces (or one E3/T3 interface and one E1/T1 interface), and up to 256 channels of HDLC. The CPM operates at up to 150 MHz and is driven by its own clock. This module is an enhanced version of the CPM used in Freescale’s MPC82xx PowerPC family. MSC8102 peripherals include four enhanced filter coprocessors, a Power PC bus interface, four serial ports, 32 timers, and a DMA controller. MSC8122 and MSC8126 peripherals include a DMA controller, a PowerPC bus interface, 10/100 Mbits/second Ethernet interface, I˛C interface, a host port, and four 256-channel TDM serial ports. The MSC8126 also includes turbo and Viterbi coprocessors. Power ConsumptionTypical power consumption of the core and on-chip memory of the MSC8101 is 450 mW at 300 MHz and 1.6 volts, according to Freescale. This figure is based on an EFR speech encoder, and includes power for the core and on-chip memory, but not for peripherals or I/O.
CostAs of the last quarter of 2004, quantity 10,000 pricing for the MSC711x ranged from about $13 to about $25; quantity 10,000 pricing for the MSC81xx ranged from about $77 to about $205.For Additional InformationThe MSC711x achieves a BDTImark2000™ score of 2240 at 200 MHz. The MSC81xx achieves a BDTIsimMark2000™ score of 5610 at 500 MHz (this score is for one core only; some parts contain four cores). For more information and scores, click here. A complete analysis of these processors, including BDTI Benchmark™ results, is contained in BDTI’s report, Buyer’s Guide to DSP Processors, 2004 Edition.Last updated January 2005. |
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