DSP Cores
BDTI
HOME << FREE INFO << PROCESSOR OVERVIEWS << BDTI

SGS-Thomson D950-CORE

The SGS-Thomson D950-CORE was introduced in 1994 and is the second 16-bit fixed-point DSP core from SGS-Thomson. The core is foundry-captive and is intended to be used in application-specific integrated circuits (ASICs) fabricated by SGS-Thomson. ASIC designers customize the amount of memory and selection of surrounding peripherals. The D950-CORE itself includes an eight-bit parallel I/O port and an emulation and test unit. SGS-Thomson provides an extensive selection of other peripherals for use with the D950-CORE, including a DMA controller, an interrupt controller, serial ports, timers, and a parallel host interface. The D950-CORE is aimed at moderate-performance, low-power applications and is capable of 40 MIPS at 3.3 volts.

SGS-Thomson concentrates on fabricating ASICS based on the D950-CORE for high-volume end users.

The D950-CORE is suitable for moderate-performance applications.

The data path of the D950-CORE supports fractional and integer arithmetic and includes a 16x16->32-bit signed/signed, signed/unsigned, and unsigned/unsigned multiplier; a 40-bit ALU, a 40-bit barrel shifter, and a bit-manipulation unit. The D950-CORE provides two 40-bit accumulators, four 16-bit general-purpose/multiplier input registers, and a product register used to store the result of a multiplication.

The D950-CORE provides three memory spaces: one for instructions and two for data. Each of the three memory spaces uses two 16-bit buses that are extended off-core to address up to 64 Kwords of off-core memory each. The D950-CORE does not contain any memory; rather, ASIC designers select the amount and type of off-core memory to be connected to the core. The D950-CORE supports three simultaneous reads from memory (one from each memory space) per instruction cycle. However, only one data write can be performed per instruction cycle. Each of the two data memory spaces has an address generator that provides two address registers and four modifier registers, which are used for post-modification, indexed addressing, and modulo addressing. One of the data memory spaces also allows bit-reversed addressing.

For detailed information on the D950-CORE including benchmark results and analysis, contact BDTI.

Top of page