BDTI’s DSP Insider Archives
BDTI
HOME << FREE INFO << DSP INSIDER ARCHIVES << BDTI

Vol. III, No. 12 BDTI’s DSP Insider November 3, 2003

This month:


StarCore LLC Offers Cores for License

Last month StarCore announced that it is offering two DSP cores for license. StarCore, originally formed in 1999 as a joint design center for Agere and Motorola, introduced the SC140 DSP core in 2000. The SC140 has since been used in chips from Motorola, but has not been available for license by other companies. Last year, StarCore made major changes to its business model (see DSP Insider, July 2002), and announced its intention to begin licensing DSP cores.

StarCore is now licensing a synthesizable version of the quad-MAC SC140 called the SC1400 and a dual-MAC variant called the SC1200. Both are 16-bit fixed-point processors, and the two use the same instruction set. Both can be licensed as standalone cores or embedded within “platforms” that incorporate various supported IP blocks.

The SC1400 is intended for a range of telecom applications, including 3G wireless and network infrastructure; it also targets multimedia and portable applications. The scaled-down SC1200 targets applications that demand moderate performance and require lower cost or lower power consumption, such as 2G and 2.5G handsets. The SC1200 and SC1400 are expected to achieve worst-case clock speeds of 340 MHz and 305 MHz, respectively, in a 0.13-micron TSMC process.

BDTI recently completed an in-depth analysis of the two cores (available in BDTI’s report, Inside the StarCore SC1200 and SC1400; see details of the report below). This analysis shows that the SC1200 and SC1400 have BDTIsimMark2000™ scores of 2690 at 340 MHz and 3420 at 305 MHz, respectively. These scores are higher than any other score BDTI has published for a licensable core to date. The previous highest score for a licensable core is 2570 for the LSI Logic ZSP500 at 325 MHz. (See http://www.BDTI.com/bdtimark/BDTImark2000.htm for more information.) It’s clear that although the StarCore architecture is now about four years old, it enters the market in a highly competitive position. In fact, the maturity of the architecture—and its proven track record in chips from Motorola—is a key advantage.

The new cores are likely to face competition not just from other licensable cores, but also from off-the-shelf chips from big-name DSP chip vendors like ADI and TI. The SC1400 and SC1200 are not nearly as fast as the fastest chips from these vendors. However, BDTI’s analysis shows that the StarCore cores have advantages in other key areas, such as energy efficiency, memory efficiency, and ease of programming.

At 100 employees, StarCore is one of the largest vendors of licensable cores, at least in terms of head count. This may prove reassuring to potential licensees who have grown wary of the longevity of core vendors, having watched several (BOPS, Lexra, and Siroyan, for example) go belly-up over the last year. Prospective customers whose products compete with those of the StarCore partners—Motorola, Agere, and Infineon—may wonder, however, just how independent StarCore LLC really is. Whether or not StarCore succeeds may depend to a great extent on its ability to win over customers by presenting an attractive technology road map and consistently meeting its commitments.

Top


Renesas and SuperH Introduce SH-X at MPF

At the Microprocessor Forum last month, Renesas and SuperH debuted the latest processor in the SuperH family, the SH-X. The SH-X is a synthesizable 32-bit fixed-point CPU core that is object-code compatible with its 32-bit predecessors, which include the SH-3, SH3-DSP, and SH-4. Renesas expects to begin shipping SH-X-based chips in early 2004. It is not yet clear whether the core will be available for license; SuperH Inc., which is responsible for SuperH core licensing activities, did not announce any licensing plans at MPF.

As might be expected based on its object-code compatibility, the SH-X core is architecturally quite similar to its predecessors. The SH-X instruction set is the same as that of the earlier SuperH cores, and the architecture is quite similar to that of the SH-4 except that it has a deeper pipeline (seven stages vs. five). Like the SH-4, the SH-X is a dual-issue superscalar machine.

Renesas will be using the core in two new chips: a low-power chip that targets mobile applications and a high-performance chip that is intended for use in car information systems. In the low-power chip, the SH-X core is augmented with the “DSP unit” from the SH3-DSP. In the high-performance version, the core includes the floating-point unit that is used on the SH-4. The low-power SH-X chip is expected to execute at 200 MHz; the high-performance chip is expected to execute at 400 MHz. Both will be fabbed in a 0.13-micron process and are expected to offer lower power consumption than previous SuperH chips.

At 400 MHz, the high-performance SH-X chip will be much faster than Renesas’ current SH-4-based offering, which runs at a maximum clock speed of 240 MHz. The low-power chip will execute at roughly the same clock speed as current SH3-DSP chips, but will offer higher DSP performance because of the SH-X’s superscalar architecture (the SH3-DSP is a scalar machine) and will also yield lower power consumption.

The BDTI Benchmarks™ show that the SH3-DSP and SH-4 themselves provide quite respectable DSP performance, with BDTImark2000™ scores of 750 at 240 MHz (SH-4, using floating-point code) and 490 at 200 MHz (SH3-DSP, using fixed-point code). For customers already using these processors, the new SH-X chips will provide a welcome step up in performance and power efficiency. The SH-X will likely compete well for new sockets, too, as it is among the faster 32-bit embedded processors currently available.

Top


BDTI Case Study

This Month: Optimizing Embedded A/V Software

A growing range of embedded systems include digital audio and video features. Audio and video are key to new products like portable A/V jukeboxes and existing products like cell phones are adding serious audio and video capabilities. The cost constraints on embedded systems drive system designers to minimize processing and memory resources, but A/V software is resource-hungry. Because of this conflict, A/V software usually requires optimization to meet real-time requirements while conserving precious system resources.

A/V software usually starts as C/C++ code. Optimization efforts typically focus on a few key functions that consume the most processing time and/or memory; these functions are typically re-written in hand-optimized assembly language, while the rest of the code is left in C/C++. A/V software can also be optimized by altering the underlying algorithms. Algorithmic transformations, e.g., splitting or combining processing steps, often lead to significantly faster and/or smaller code. In some cases, it is possible to replace an algorithm with a similar but more efficient algorithm. For example, there are many different FFT algorithms; choosing one that better matches a processor’s capabilities can dramatically improve performance.

Many optimization techniques involve tradeoffs between speed, code size, and numerical precision. For example, many speed-oriented optimizations increase code size. Understanding these tradeoffs and striking an appropriate balance requires expertise in both processor architectures and signal-processing theory, as well as a thorough understanding of the application. Development tools often present additional challenges; for example, compilers typically offer limited support for using processor features like caches and signal-processing-oriented instruction-set enhancements.

BDTI’s unique combination of expertise in processor architectures, signal-processing theory, and software development gives it a unique understanding of the tradeoffs involved in optimizing A/V software. For example, BDTI can quickly identify algorithmic modifications that reduce resource use while maintaining signal fidelity. In addition, BDTI’s specialized development methodologies, which include proprietary floating-point to fixed-point conversion tools and in-house performance profiling tools, help assure timely, high-quality results.

Over the past several years, BDTI has created highly optimized implementations of audio and video algorithms for products including cellular handsets, PDAs, set-top boxes, and military equipment. To learn more about BDTI’s past projects and how BDTI can help you implement A/V software in your embedded application, contact Jeremy Giddings at BDTI (giddings@BDTI.com).

Top


Impulse Response, by Jeff Bier

Chips: You Can’t Have Just One

At last month’s Microprocessor Forum, Sun Microsystems CTO Greg Papadopoulos predicted that microprocessors as we know them will disappear by 2010. In his view, microprocessors will continue to absorb surrounding chips until the entire computer is contained in a single chip. This prediction reminded me of claims by Texas Instruments that cell phones will soon contain nothing more than a single chip and a handful of passive components.

There is no denying the trend towards higher integration in everything from PCs to cell phones. The advantages of increased integration—particularly the potential for reduced system size, cost, and power consumption—are so compelling that it is tempting to extrapolate this trend line to single-chip utopia. However, the benefits of integration are not always relevant, and they are sometimes coupled with serious drawbacks.

Consider the advantage of reduced size. While some applications are pressed for space, others have room to spare. For example, who needs a smaller cell phone? They are barely big enough to hold now. Even if you did shrink the chips, you wouldn’t shrink the phone much: today’s cell phones are mostly battery, display, and keypad.

The benefits of lower power consumption are also dicey. All other things being equal, you’d expect that fewer chips would equate to lower power consumption. But all other things are never equal, particularly if you are building a truly single-chip solution. Today, most “system on a chip” designs require external memory, power electronics, and other supporting chips. In many cases, each chip uses a different fabrication process. Going to a single-chip solution may require fabrication process compromises that cause some components to consume more power. Depending on the mix of components and inter-component activity, this could lead to higher overall power consumption.

Likewise, cost is an oft-cited argument for integration. Again, this argument is strongest when all other things are equal, such as when all components are digital logic. If you have to use special, expensive fabrication techniques to integrate dissimilar components onto a single chip, the cost argument may break down. And this is before you consider the extra engineering effort, yield problems, and other factors that crop up as chips grow more complex.

For most applications, the benefits of increased integration still outweigh these drawbacks. But like all good things, these benefits eventually must end. Despite the hype, few applications will see a day when “system on a chip” can be taken literally.

Top


BDTI Updates Buyer’s Guide to DSP Processors

For over 10 years, BDTI has provided the electronics industry with in-depth, independent analysis of technology for digital signal processing applications. BDTI is now pleased to announce a new edition of its flagship report, Buyer’s Guide to DSP Processors, the most widely respected—and widely used—report on processors for signal processing applications.

BDTI’s Buyer’s Guide to DSP Processors includes:

  • In-depth analysis of processor strengths and weaknesses
  • Performance analysis based on the BDTI Benchmarks™
  • Comparison of major commercial DSP processor families, including Analog Devices’ TigerSHARC and Blackfin, and TI’s ’C55 and ’C64

Buyer’s Guide to DSP Processors, 2004 Edition is scheduled for publication on December 1, 2003. Orders received by November 15 will receive a 10% early order discount. In addition, BDTI offers substantial discounts on multiple-copy purchases. And this year, for the first time, Buyer’s Guide 2004 will also be available in an electronic version (PDF) under the terms of an enterprise license. For more information, including order forms, visit our Web site at http://www.BDTI.com.

Buyer’s Guide is written for engineering, investment, and marketing professionals who need an in-depth understanding of major merchant market DSP processors. Get the 2004 edition of Buyer’s Guide, and give yourself and your company the same competitive advantage that savvy industry insiders have enjoyed for a decade.

Top


BDTI Releases Inside the StarCore SC1200 and SC1400

Inside the StarCore SC1200 and SC1400 is the latest in BDTI’s series of in-depth technical evaluations of individual processors.

Inside the StarCore SC1200 and SC1400 includes:

  • A comprehensive analysis of both cores’ architectures and features
  • Complete benchmark results for each of the 12 BDTI Benchmarks™
  • Comparison of the SC1200 and SC1400 with:
    • Analog Devices ADSP-TS20x TigerSHARC
    • Analog Devices ADSP-BF53x Blackfin
    • LSI Logic ZSP500
    • Motorola MSC81xx (based on the SC140 core)
    • TI TMS320C55x
    • TI TMS320C64x

Like all BDTI Inside reports, Inside the StarCore SC1200 and SC1400 incorporates the results of detailed, hands-on analysis performed by BDTI’s expert staff.

For excerpts from the report, including sample benchmarks, go to http://www.BDTI.com/products/reports_sc1200_1400.html.

Top


BDTI Updates Benchmark Scores

BDTI has updated its BDTImark2000™ and BDTIsimMark2000™ scores. Processors with updated scores include the StarCore SC1200, StarCore SC1400, and TI TMS320C64x.

For these scores, go to http://www.BDTI.com/bdtimark/BDTImark2000.htm.

The BDTImark2000™ and BDTIsimMark2000™ are summary measures of DSP speed distilled from a suite of DSP benchmarks developed and independently verified by BDTI.

Top


About BDTI

BDTI is an independent source for digital signal processing technology analysis and optimized software development services. From rigorous technical analyses of processors for DSP, such as the Inside series of processor analyses, to highly regarded technology seminars, BDTI is the trusted independent source for reliable information on digital signal processing technology.

As a software developer, BDTI is known for highly optimized implementations of signal processing algorithms and applications and for solutions to complex problems of integration, code size, and performance.

For more information, visit our Web site at http://www.BDTI.com.

Top


The next issue of BDTI’s DSP Insider is coming in December. Previous issues of BDTI’s DSP Insider are archived on BDTI’s Web site. Follow the link from http://www.BDTI.com/dspinsider.htm. If you have comments, suggestions, or other feedback about the DSP Insider, please send email to dspinsider@BDTI.com.

BDTI’s DSP Insider is a free monthly electronic newsletter published by Berkeley Design Technology, Inc. If our newsletter was forwarded to you and you would like to receive it regularly, please register at http://www.BDTI.com/dspinsider.htm.

If you no longer wish to receive the DSP Insider, send an email message to dspinsider@BDTI.com with the words “Remove me” in the subject line.

Top


<< previous issuenext issue >>


Top of page