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This month:
Motorola Expands 56800E LineupLast month Motorola introduced the MC56F83xx family of control-oriented DSPs. The MC56F83xx is the second processor family based on the 56800E core. It succeeds the DSP56F8xx, which uses the older, slightly less efficient 56800 core. All six members of the MC56F83xx family operate at an instruction cycle rate of 60 MHz, making them about 50% faster than the DSP56F8xx. (The DSP56F8xx operates at clock rates of up to 80 MHz, but requires two clock cycles per instruction.) In addition, the MC56F83xx contains up to 256 Kbytes of on-chip flash memory, roughly double the amount available on the DSP56F8xx. Last but not least, the MC56F83xx adds a number of peripherals, such as an on-chip temperature sensor. While the MC56F83xx is much faster than its predecessor, it is quite slow compared to most mainstream DSPs. For example, an analysis of BDTImark2000™ scores shows that a 160 MHz Texas Instruments ’C54x is roughly three times faster than a 60 MHz MC56F83xx. (BDTImark2000™ scores for these and other processors are available at http://www.BDTI.com/bdtimark/BDTImark2000.htm.) However, the MC56F83xx targets automotive and industrial applications that require only modest signal processing speed. In automotive applications in particular, cost-effectiveness and reliability are often more important than high signal processing speed. The pricing and features of the MC56F83xx reflect these priorities. The pricing for the MC56F83xx, which begins at $8.13 in 10,000-unit quantities, is modest given its processing capabilities, its complement of on-chip flash memory and peripherals, and its safety features. Motorola is emphasizing the safety features, which extend to the memory system and the peripherals. For example, the MC56F83xx includes an on-chip power supervisor that allows the processor to perform a controlled shutdown if the supply voltage begins dropping out of a safe operating range. Motorola is one of the largest semiconductor suppliers to the automotive industry. Its continued development of the 568xx family reflects the growth of signal processing in automotive markets. As signal-processing hardware become less expensive, signal processing is infiltrating a growing range of automotive systems. At the same time, increasing demands in areas such as emissions control and safety create an expanding need for computational horsepower. As a result, DSPs are likely to proliferate in applications like electronic power assisted steering, advanced engine control systems, and occupant detection.
All six members of the MC56F83xx are currently sampling. Pricing for
the MC56F83xx ranges from $8.13 to $15.93 depending on the size of
on-chip memory and complement of peripherals.
Analog Devices Announces Faster, Cheaper SHARCOn August 11, Analog Devices (ADI) introduced a new chip in its floating-point DSP line, the ADSP-21262. The ’21262 is based on ADI’s dual-MAC SIMD core, which ADI originally dubbed “Hammerhead.” ADI now refers to the ’21262 as a “third-generation SHARC,” presumably to emphasize the chip’s assembly-code compatibility with the earlier ADSP-2106x chip family and to differentiate these two families from ADI’s high-performance TigerSHARC chips. The ’21262 is currently sampling at 200 MHz and 1.2 volts and is priced at $14.95 in 10,000-unit quantities. The chip targets audio, automotive, medical, and voice recognition applications. The new chip is significantly better than previous SHARC processors on virtually every metric. At 200 MHz, it is twice as fast as earlier SHARCs, but is only about two-thirds the price. ADI has also managed to bring the SHARC within striking distance of the speed of TI’s fastest TMS320C67x. The 225 MHz ’C6713 has a BDTImark2000™ score of 1100, compared to a score of 950 for the ’21262. The 225 MHz ’C6713 costs nearly twice as much as the ’21262, however, giving ADI an advantage in cost-effectiveness. The ’21262 is much slower than ADI’s own TigerSHARC family, which operates at speeds of up to 600 MHz. But even the cheapest TigerSHARC family member costs about 2.5 times more than the ’21262. Perhaps more importantly, TigerSHARC is not code-compatible with SHARC processors. By migrating to a 1.2-volt process, ADI has significantly improved the ’21262’s energy efficiency relative to earlier family members. At 1.2 volts, the ’21262 is nearly four times as energy efficient as the ’21161 at 1.8 volts (in terms of BDTImark2000™ /mW). In contrast, the 1.2-volt ’C6713 is about 25% less energy efficient than the ’21262.
In the past few months ADI has doubled the clock rate of both of its
key floating-point architectures—first TigerSHARC, and now SHARC. It
appears that ADI has no intention of ceding the pole position in the
floating-point DSP market.
BDTI Case Study
This Month: Measuring Energy ConsumptionEnergy consumption is a chief concern for many DSP applications, especially for portable applications where battery life is paramount. In these applications, an accurate understanding of energy consumption is critical to processor selection and to system design. Unfortunately, many obstacles hinder comparisons of processors’ energy consumption. One key problem is that vendors usually report power consumption, not energy consumption. Calculating energy consumption—which is typically more useful—requires knowing both the power consumption and the execution time for the task at hand. But it can be difficult to project execution times for key application tasks. Another challenge stems from the fact that different vendors include different components in their power figures. For example, some vendors include on-chip peripherals and off-chip I/O in their power measurements, but others do not. This is a major problem: power consumed by peripherals and I/O is often on the same order as the power consumed by the core and on-chip memory. Vendors also make inconsistent—and sometimes unrealistic—assumptions about processor workloads when reporting power consumption. For example, vendors may assume the workload includes a significant percentage of idle time. Even power reported for realistic workloads can be misleading, as seemingly small differences in algorithms can dramatically affect power consumption. The inconsistency of the available data suggests that system designers might benefit from measuring processor energy consumption themselves. However, accurately measuring energy consumption is a tricky task: there are many variables to control, and the measurements are easily skewed by undesired phenomenon. Over the past ten years, BDTI has performed hands-on benchmarking of the energy consumption of a variety of processors with the cooperation of major processor vendors. The expertise gained from these studies allows BDTI to provide realistic, consistent analysis of processor energy consumption. Processor users and developers can engage BDTI’s consulting services for processor energy benchmarking and related analysis.
BDTI also provides optimized software development services for
energy-constrained applications. If you would like to learn how
BDTI’s expertise can help you meet your energy-consumption-related
challenges, please contact Jeremy Giddings at BDTI
(giddings@BDTI.com).
Impulse Response, by Jeff Bier
Your Mileage May VaryWith gasoline prices wildly fluctuating in the United States, car buyers are paying increased attention to fuel efficiency. And fuel efficiency seems easy to determine: new cars come plastered with enormous stickers proclaiming their EPA-rated fuel efficiency. However, environmentalists are quick to point out that these EPA ratings are only loosely related to real-world fuel efficiency. The EPA admits as much, adding small print that reads “your mileage may vary.” Fuel efficiency is tough to pin down because it depends on many factors, such as altitude and driving style. Similarly, performance metrics for licensable processor cores are quite slippery because they depend on many factors. Consider clock speed—one of the easiest-to-grasp attributes of a licensable core. The clock speed achieved by a given core depends on a long list of variables, including the fabrication process and cell library used to build the chip, the EDA software used to design the chip, and the skill of the chip designers, just to name a few. Making even small changes to just one of these variables can significantly impact the clock speed achieved. One unfortunate consequence of this complexity is that it leaves ample opportunities for core vendors to unrealistically inflate the performance of their cores. For example, a core vendor may report core clock speeds that can only be achieved if the user accepts a 50% manufacturing yield. Since most SoC developers cannot afford to throw away half of their chips, they are unlikely to achieve such speeds. Even when core vendors present realistic performance data, there is no guarantee that competing vendors will base their performance claims on similar conditions—or that these conditions will match conditions used by their licensees. For example, SoC designers generally target low cost and low power consumption, not maximum speed. Despite this, core licensors often quote speeds that can only be achieved with expensive, power-hungry designs. This is like using EPA city mileage ratings to plan a cross-country trip: the numbers aren’t wrong, but they aren’t helpful, either.
Unfortunately, there is no simple solution to these problems. Indeed,
the situation is only becoming more complex as process geometries
shrink and SoC designs become larger. The best policy for core
vendors is to drop inflated performance claims and educate customers
on these complexities. And the best thing SoC designers can do is to
read the fine print that says “your mileage may vary.”
BDTI Announces Buyer’s Guide to DSP Processors, 2004 EditionBDTI is pleased to announce plans for a new edition of its flagship report, Buyer’s Guide to DSP Processors. Buyer’s Guide is the single most authoritative body of information on processors for signal processing applications. BDTI’s Buyer’s Guide to DSP Processors includes:
The publication date for Buyer’s Guide 2004 will be announced
shortly. Early order discounts are available. For pricing and
availability, visit http://www.BDTI.com.
Visit BDTI’s Booth at CDC in San Jose, Oct. 1-2Come meet BDTI analysts and engineers at the Communications Design Conference this week. On Wednesday and Thursday, October 1 and 2, BDTI will be exhibiting at CDC, held at the San Jose Convention Center.
For information on this and other industry events where you can meet
BDTI, go to http://www.BDTI.com/bdti_whatsnew.html.
BDTI Updates Benchmark ScoresBDTI has updated its BDTImark2000™ and BDTIsimMark2000™ scores. Processors with updated scores include the ADI ADSP-TS201S (TigerSHARC), ADI ADSP-2116x/2126x (SHARC), LSI Logic ZSP400, and SuperH SH-4. For these scores, go to http://www.BDTI.com/bdtimark/BDTImark2000.htm.
The BDTIsimMark2000™ and BDTImark2000™ are summary measures of
DSP speed distilled from a suite of DSP benchmarks developed and
independently verified by BDTI.
About BDTIBDTI is an independent source for digital signal processing technology analysis and optimized software development services. From rigorous technical analyses of processors for DSP, such as the Inside series of processor analyses, to highly regarded technology seminars, BDTI is the trusted independent source for reliable information on digital signal processing technology. As a software developer, BDTI is known for highly optimized implementations of signal processing algorithms and applications and for solutions to complex problems of integration, code size, and performance.
For more information, visit our Web site at http://www.BDTI.com.
The next issue of BDTI’s DSP Insider is coming in November. Previous issues of BDTI’s DSP Insider are archived on BDTI’s Web site. Follow the link from http://www.BDTI.com/dspinsider.htm. If you have comments, suggestions, or other feedback about the DSP Insider, please send email to dspinsider@BDTI.com. BDTI’s DSP Insider is a free monthly electronic newsletter published by Berkeley Design Technology, Inc. If our newsletter was forwarded to you and you would like to receive it regularly, please register at http://www.BDTI.com/dspinsider.htm.
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