BDTI’s DSP Insider Archives
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This month:
Intrinsity’s 2 GHz Processor Begins SamplingIn April Intrinsity announced general sampling of the 1.5 and 2 GHz versions of its FastMIPS and FastMATH processors. Both processors are based on the MIPS32 architecture; the FastMATH processor adds a matrix math engine to the baseline architecture. (The FastMATH architecture is described in the June 2002 edition of the DSP Insider.) The combination of high clock speed and matrix-processing capabilities give the Intrinsity FastMATH processor impressive signal-processing speed on algorithms with ample opportunity for parallel processing. On BDTI’s Complex Block FIR Filter benchmark, for example, the 2 GHz FastMATH processor is roughly five times faster than fastest mainstream DSP available today, Texas Instruments’ 720 MHz ’C64xx. However, the FastMATH processor is less speedy on algorithms with few opportunities for parallel processing. In fact, the 2 GHz FastMATH processor is slower than the 720 MHz ’C64xx on two of the BDTI Benchmarks™ . In terms of overall signal processing speed, the FastMATH processor is the fastest processor ever benchmarked by BDTI. The FastMATH processor has a BDTIsimMark2000™ score of 11960, which is about two times higher than the 720 MHz ’C64xx BDTImark2000™ score of 6480. (Information on these scores is available at http://www.BDTI.com/bdtimark/BDTImark2000.htm.) Intrinsity is offering this high speed at reasonable prices. The 1.5 GHz FastMATH processor is priced at $199 in 10,000-unit quantities—the same price as the significantly slower 720 MHz ’C6414. At a price of $349 in 10,000-unit quantities, the 2 GHz FastMATH processor is less cost-effective, but it offers about the same speed per dollar as the 720 MHz ’C6414. However, slower versions of the ’C64xx are far more cost-effective than the FastMATH processor. The FastMATH processor is less competitive in terms of energy efficiency. BDTI does not have sufficient data for a thorough energy-efficiency analysis yet. However, Intrinsity’s preliminary data suggests the 2 GHz FastMATH processor energy efficiency is five times worse than that of the 720 MHz ’C64xx. To make its technology more appealing for power-sensitive applications, Intrinsity announced it would begin sampling the more-efficient FastMATH-LP processor in the fourth quarter of this year. The FastMATH-LP processor is projected to be about 20% more energy-efficient that the currently available part.
As explained in the June 2002 edition of the DSP Insider, Intrinsity’s
processors use novel dynamic logic techniques to achieve their high
speeds. Intrinsity is a young, small company, so it is impressive
that it has been able to deliver these technologies on schedule and at
reasonable prices. If Intrinsity can continue to deliver on its
promises, it will greatly strengthen its position against its larger,
well-established competitors.
Observations From ISPC/GSPxLast month BDTI participated in the International Signal Processing Conference and Global Signal Processing Expo (ISPC/GSPx) held in Dallas, Texas. The conference included many insightful presentations on tough signal-processing problems. The presenters represented a mix of corporations and universities, and topics ranged from practical tips to esoteric algorithms. One of the more interesting presentations introduced AccelFGPA, a tool under development by the venture-backed start-up AccelChip. AccelFGPA uses techniques developed at Northwestern University to map algorithms described in MATLAB into FPGA implementations. This tool targets a fundamental problem of FPGA-based signal processing: few DSP application developers are familiar with the established design flows for FPGAs. In contrast, most DSP application developers are familiar with MATLAB, and DSP application designs often begin life as MATLAB models. A tool that translates MATLAB models to efficient FPGA implementations could be immensely useful. It will be interesting to see if AccelFGPA can deliver on this intriguing concept. STMicroelectronics presented another interesting concept in its “OptiPAX” coprocessor architecture. The key feature of the OptiPAX architecture is its split-instruction transaction model. Typically, CPU cores send data to and request results from a coprocessor using a single instruction. As a result, the CPU may stall for several cycles while the coprocessor processes the data. In contrast, the OptiPAX architecture uses separate instructions to send data and to request results, allowing the CPU to access a coprocessor without stalling, even when the coprocessor operation requires multiple cycles. STMicroelectronics claims this subtle improvement can lead to large performance gains. Other presentations shared practical insights into common signal-processing challenges. In one such presentation, Dror Halahmi of Motorola analyzed the impact of the MSC8102 cache system on the processor’s signal-processing performance and explained how some unusual features of the MSC8102 cache system can be used to mitigate this impact. It was encouraging to see a DSP vendor giving such close attention to this crucial but often-overlooked topic.
The quality of these presentations suggests that ISPC/GSPx is off to a
good start. We look forward to participating in ISPC/GSPx again next
year.
BDTI Case Study
This Month: Matching Processors to ApplicationsSignal processing is rapidly advancing into a broad range of new applications. For example, cell phones are adding multimedia features such as audio and video playback. At the same time, processor choices are rapidly expanding. For example, the number of “application processors” targeting mobile multimedia applications seems to grow every month. Picking the best processor requires careful analysis of both the application requirements and the capabilities of the candidate processors. Identifying the important application requirements can be a surprisingly difficult process. Some application needs are easy to quantify: for example, the processor must be fast enough to handle the application workload. However, other selection criteria are less concrete: for example, the vendor’s roadmap for the processor—and your confidence that the roadmap will be executed—may be a critical consideration. Even after the application-based selection criteria have been pinpointed, it can be difficult to use these criteria to evaluate the candidate processors. Evaluating complex new architectures like Texas Instrument’s OMAP and STMicroelectronics’ Nomadik can be particularly tricky. OMAP and Nomadik are just two examples of the recent wave of heterogeneous multiprocessors, devices that combine two or more dissimilar processor cores into a single chip. Properly assessing one of these processors requires analysis not only of each core but also of inter-core communications and other multiprocessor-specific issues. Unfortunately, system designers typically have little time to select a processor. As a result, making a good selection is a significant challenge—but BDTI stands ready to help. BDTI has wide-ranging knowledge of DSP applications and processors and has a vast library of ready-to-use processor and application analyses. Most importantly, BDTI has years of experience developing and applying rigorous methodologies to tough technology selection problems. BDTI recently exercised its expertise by helping a major telecom equipment manufacturer evaluate processors for next-generation, multimedia-enhanced products. BDTI used its extensive experience in audio and video applications to develop detailed processing requirements for the client’s future products. BDTI then developed an analysis tool that enabled the client to evaluate processors based on these requirements. The analysis tool leveraged BDTI’s database of benchmark results and also took account of qualitative factors like the quality of software development tools.
To learn how BDTI’s DSP expertise can be applied to help you select a
processor for your DSP application, please contact Jeremy Giddings at
BDTI (giddings@BDTI.com).
Impulse Response, by Jeff Bier
Stuck in the PastIn his keynote address at last month’s International Signal Processing Conference, Professor Alan Oppenheim showed how traditional signal processing methods can clash with advances in computing hardware. Professor Oppenheim compared two approaches to implementing the discrete Fourier transform. Most DSP engineers assume that the usual approach, the fast Fourier transform (“FFT”), is always the most efficient. However, Professor Oppenheim showed that the FFT is less efficient than other approaches on some important classes of processors. Professor Oppenheim’s talk pointed to a growing problem in DSP: outdated assumptions lead engineers to pursue the wrong goals. For example, the FFT is designed for systems where computational resources are the main performance bottleneck, but in some modern systems, communications resources are the real bottleneck. Yet many engineers are prone to blindly using the FFT because of its traditional performance advantages. These same outdated assumptions are afflicting DSP processor design. To a large extent, DSP processor design is driven by the historical expense of key processor resources—and not by a search for optimal processing methods. In the first generation of DSPs, computational units were extremely expensive; the multiplier unit alone occupied a quarter of the die area. As a result, computational units have been treated like royalty. Traditional processor designs surround a handful of computational units with legions of subservient registers, buses, and other supporting hardware. The problem with this design is that it involves a huge amount of indirection. To complete a multiplication, for example, the processor must load an instruction, decode the instruction, compute the operand addresses, move the operands from memory into registers… and then finally perform the multiply. And storing the result requires nearly as many steps.
Today, computational units are cheap—and they take up a minute
portion of a processor’s real estate. Not surprisingly, modern DSPs
contain far more computational units than yesterday’s chips. Yet DSP
processors still coddle the computational units in a vast sea of
supporting hardware. This supporting hardware now stands in the way
of efficiency. For example, DSPs could be more energy-efficient if
they didn’t spend so much juice shuffling data back and forth between
memory, registers, and computational units.
For general-purpose, non-computationally-intensive tasks, it may still
make sense to treat a computational unit like a king. But for DSP
applications, it may be time to consider different approaches.
Indeed, we expect non-traditional architectures like FPGAs to become
increasingly common in signal-processing applications.
BDTIsimMark2000™ for the Intrinsity FastMATH ProcessorBDTI has just released a BDTIsimMark2000™ score for the Intrinsity FastMATH processor running at 2 GHz. This score, which provides a single-number representation of signal-processing performance, is based on recent benchmarking using the BDTI Benchmarks™ . BDTI has also released updated benchmark scores for the Texas Instruments TMS320C64xx (720 MHz), the Agere DSP164xx (285 MHz), and the Analog Devices ADSP-BF53x Blackfin (600 MHz). For these and other scores, go to http://www.BDTI.com/bdtimark/BDTImark2000.htm.
The BDTIsimMark2000™ and BDTImark2000™ are summary measures of
DSP speed distilled from a suite of DSP benchmarks developed and
independently verified by BDTI.
New BDTI Seminar at Embedded Processor ForumThe 2003 Embedded Processor Forum, to be held June 16-19 at the Fairmont Hotel in San Jose, will feature a new BDTI seminar, Processors for Communication and Multimedia Applications. This seminar answers the question, “Which processors best meet the needs of the new, integrated communications and multimedia applications?” Today’s communications and multimedia applications, such as in smart phones and consumer media products, require serious signal-processing horsepower. But speed alone isn’t enough: processors for these applications must also provide rich development infrastructure and meet tight cost and power constraints. The seminar classifies the numerous processors that target communications and multimedia applications into manageable categories and provides in-depth, objective analysis of the most important architectures and products. The seminar reveals what it takes for a processor to succeed in today’s demanding DSP-centric applications and provides unique insights into technology trends and vendors’ strategies.
For information and links for schedule, location, and complete
program, go to http://www.BDTI.com/bdti_whatsnew.html#epf.
BDTI Products and Services
DSP Software Development ServicesBDTI overcomes difficult software implementation challenges, helping companies go to market with highly integrated and complex signal processing applications. For set-top boxes, multimedia-enabled cell phones, multimedia-enabled PDAs, Internet appliances, portable digital audio players, and more.
DSP Advisory ServicesBDTI helps companies make informed, solid decisions. BDTI can help: choose a new processor; select the right tools; evaluate a product plan; perform technical due-diligence; and more. From short-term consulting services to extensive research and analysis.
BDTI Technology ReportsCompanies use BDTI technology reports for insights into the technology choices and into their competitors. Based on hands-on benchmarking and in-depth analysis, BDTI’s Inside reports and Buyer’s Guide to DSP Processors deliver man-years of intelligent analysis and data.
You will find more information on these and other BDTI products and
services at http://www.BDTI.com. Or contact Jeremy Giddings at
giddings@BDTI.com.
About BDTIBDTI is an independent source for DSP technology analysis and optimized DSP software development services. From rigorous technical analyses of processors for DSP, such as the Inside series of processor analyses, to highly regarded technology seminars, BDTI is the trusted independent source for reliable information on DSP technology. As a software developer, BDTI is known for highly optimized implementations of signal processing algorithms and applications and for solutions to complex problems of integration, code size, and performance.
For more information, visit our Web site at http://www.BDTI.com.
The next issue of BDTI’s DSP Insider is coming in June. Previous issues of BDTI’s DSP Insider are archived on BDTI’s Web site. Follow the link from http://www.BDTI.com/dspinsider.htm. If you have comments, suggestions, or other feedback about the DSP Insider, please send email to dspinsider@BDTI.com. BDTI’s DSP Insider is a free monthly electronic newsletter published by Berkeley Design Technology, Inc. If our newsletter was forwarded to you and you would like to receive it regularly, please register at http://www.BDTI.com/dspinsider.htm.
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