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Vol. I, No. 7              BDTI's DSP Insider            November 2001

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This month:

  ***  Now for Something Completely Different
  ***  Siroyan Attacks Scalability
  ***  Custom Algorithm Development
  ***  "Impulse Response," a news analysis and opinion column written
       by Jeff Bier, BDTI's General Manager, and featured in EE Times

  ***  BDTI Announces Year-End Discount on "Buyer's Guide 2001"
  ***  BDTI Evaluates Processor Technology
  ***  New "Inside" Reports: StarCore, Hitachi, 3DSP, and ARM
       Processors
  ***  New Processor Summary for the ADI/Intel MSA

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***  Now for Something Completely Different

At the Communication Design Conference in October Lenslet unveiled its
novel optical digital signal processing engine (ODSPE), which, it
hopes, will boost DSP performance to the level of tera operations per
second—far above the current level of giga operations per second
found in today's electron-based processors.  This technology targets a
wide range of applications that include both wireless and wireline
communication systems.

The heart of digital signal processing is the manipulation of digital
signals, often by means of transforms like the FFT.  The foundation of
Lenslet's approach is based on the fact that light undergoes similar
transformations when it passes through optical elements.  Imagine
light moving towards an optical element as input data and the same
light, having passed through the optical element, as output data.
With suitably adjustable optical elements, this system could implement
any kind of digital transform.

The major advantage of this approach is the speed with which
transforms can be performed.  While transforms implemented with
conventional electronic circuits require multiple manipulations of a
data series, optically based digital signal processing can perform a
transform with but one pass of light through a lens.  And the optical
elements required for this—vertical-cavity surface-emitting lasers,
compound lenses, spatial light modulators—are inexpensive.  However,
ODSPEs only address transforms, and thus traditional DSPs or other
solutions will still be required for other processing functions, e.g.,
encoding and decoding algorithms.

Lenslet plans to release two product implementations of this
technology—the EnLight256 and the Customized-EnLight.  The EnLight256
will be a general-purpose reconfigurable electro-optical transform
engine that functions as a coprocessor connected to a master
processor.  The EnLight256's reconfigurability is twofold: it can
adjust its optical elements to the predetermined specifications of any
transform in its transform library, and new transforms can also be
added to this transform library. The Customized-EnLight can be custom
tailored to meet the specific needs of an application.  Prototypes of
Lenslet products are expected next year, with production not
anticipated until 2004.  The company has already demonstrated an 8
TOPS, 20 Watt device.


***  Siroyan Attacks Scalability

At the Microprocessor Forum in October, five companies unveiled new
DSP architectures.  This was also the debut for one of these
companies, Siroyan, a UK startup backed by venture capital.  Siroyan
had previously been a quiet presence in the DSP world, but now it has
taken a very aggressive stance on scalability—its new architecture
targets applications that range from ultra cost-sensitive disk drives
to high performance wireless communications infrastructure.

The Siroyan OneDSP architecture, which employs a VLIW approach, is
based on the concept of "clusters."  A cluster is essentially a
complete processor outfitted with its own execution units and a
variety of dedicated resources, e.g., registers and local memory.
Each cluster in the OneDSP handles two VLIW slots: one for
loads/stores and one for computation.  Despite the self-sufficiency of
the clusters, the OneDSP uses a single control thread. Thus, at least
from a programmer's perspective, the OneDSP resembles a traditional
VLIW machine.

The advantage of the cluster approach is scalability.  In the
high-performance 'C6xxx family from Texas Instruments, for example,
each register file has read and write ports for each of four execution
units.  Given this already complex register circuitry, adding more
execution units would be a serious challenge. In contrast, adding
execution units to the OneDSP would have little impact on the existing
circuits because clusters are connected in a nearest-neighbor
topography. This building-block approach to scalability is similar to
that found in the BOPS ManArray architecture, which has many other
features in common with the OneDSP.  Scalability is increasingly
important as today's DSP applications become more and more demanding
on processors.

The OneDSP is entering an already crowded field of VLIW architectures,
but Siroyan may be able to capitalize on the mistakes made by its
predecessors.  Siroyan's extreme approach to wide ranging
scalability—if it works—should go a long way towards earning the
company a foothold in the market for licensable DSP architectures.


***  BDTI Case Study

This month:  Custom Algorithm Development

Digital electronics are becoming less expensive, more powerful, and
more energy efficient.  Thus, designers of applications formally
reliant on analog algorithms are increasingly using digital algorithm
implementations that exploit the capabilities of DSP.  Besides the
economic advantage—digital algorithm implementations can often be
implemented with little or no cost using hardware already present in a
system—there are several other key advantages to digital systems:
reprogrammability, relative insensitivity to their environment, and,
often, smaller size.  Collectively, these provide a compelling
argument for going digital.

Doing so, however, can be tricky.  It is almost always possible to do
a straightforward mapping of an analog algorithm into the digital
domain.  For the sake of efficiency and signal fidelity, however, it
often makes sense to recast the algorithm to create a better match
with the capabilities of DSP hardware—analog efficiency does not
always imply digital efficiency.  Such algorithm recasting often
involves a reevaluation of exactly what the algorithm is intended to
accomplish; the algorithm can then be tailored to match the strengths
of available DSP hardware.

One BDTI customer recently needed a digital implementation of an
analog audio processing algorithm for home theater applications.
Beginning with a mathematical description of this algorithm, we
created a new digital algorithm that provided the equivalent
functionality while making efficient use of the available hardware, in
this case a DSP-enhanced general-purpose processor.

Virtually any analog algorithm can be implemented in the digital
realm.  If you would like to learn more about BDTI's capabilities, or
if you know that these might be helpful to your project, please
contact Jeremy Giddings (giddings@bdti.com) or visit our Web site
(www.bdti.com/products/services_software.htm).


***  Impulse Response, by Jeff Bier

This month:  Better Late than Never?

After Odysseus left to fight in the Trojan War, the ever-patient
Penelope waited nineteen years for his return.  Delayed by a few snags
on the way back, he did eventually make it home, albeit much later
than expected.

This phenomenon is not unknown in world of microprocessors, in which
new processors are often late—sometimes very late.  This is a serious
problem, particularly among high performance chips.  Moreover, in
addition to being late, these chips are often not up to spec when they
arrive.

In many ways this is understandable.  Developing any processor, and
especially high-end processors, is a massive undertaking with more
than ample opportunity for mishaps.  But in their enthusiastic drive
to promote new products, vendors often make overly aggressive and
optimistic projections about availability and performance.  This
effort to strengthen their competitive position and win ever-important
early customer support can ultimately hurt customers and backfire on
vendors.

System developers often design systems in anticipation of a particular
new processor becoming available at a certain time and with certain
specs.  If that doesn't happen, their plans can be severely disrupted.
Entire companies have been doomed by delays in processor availability
and chips that don't function as promised.  Even delays of six months
or less can be fatal in the cutthroat world of consumer products.

This problem, endemic in the processor world generally, is only
amplified with DSPs.  Because most DSP architectures are proprietary
to a specific chip vendor, if a new processor isn't delivered on time
it may be quite difficult for a system developer to switch to another
processor.  Even within a single vendor's product line, chips are
often incompatible, not to mention greatly disparate in performance.
This makes last minute processor changes almost impossible to
accommodate.

Certainly processor vendors face a dilemma: they need to disclose new
product information to their customers early, but such information is
necessarily subject to change.  At best, vendor projections are
educated guesses.  At worst, overly aggressive projections are
misleading.  Until vendors commit to giving their customers realistic
projections—and updating these as their own expectations change—
system designers must protect themselves.  They must find a mast that
will shelter them from the Siren songs that vendors sing.

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***  Year-End Discount on "Buyer's Guide 2001"

From now until the end of the year, BDTI is offering a 50% discount
on first-copy purchase of "Buyer's Guide to DSP Processors, 2001
Edition."  BDTI's flagship report, now in its fifth edition, "Buyer's
Guide 2001" contains in-depth analysis and benchmarking of 17
families of programmable digital signal processors.

Visit www.BDTI.com for details of the report and an order form.

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***  BDTI Provides Independent Evaluation of Technology

BDTI provides expert, independent analysis of processor technology,
including architectures and compilers.

For evaluation of processors, BDTI offers the BDTI Benchmark
methodology for licensing.  For developers and users of compilers,
BDTI is rolling out its compiler benchmarking methodology and is now
inviting companies to become early adopters. For developers and users
of processor technology, as well as investors, BDTI offers a wide
range of services on a consulting basis for assignments such as
processor selection, competitive analysis, algorithm evaluation, and
technical due diligence.

Visit on our Web site (www.bdti.com/products/services_overview.htm)
or contact Jeremy Giddings (giddings@bdti.com) for more information.

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***  "Inside" Reports on 3DSP, ARM, and Hitachi/ST Processors

BDTI continues to roll out detailed analyses of key processors
targeting digital signal processing applications. BDTI's "Inside"
series of technical reports combine benchmarking, in-depth evaluation
of architecture, performance, and features, and expert analysis based
on BDTI's extensive knowledge and experience.

Scheduled for publication this fall:
"Inside the 3DSP SP5" provides the first detailed study of 3DSP's
fixed-point SP5 processor core with SuperSIMD(tm), combining a
superscalar architecture with SIMD.

"Inside the ARM ARM7, ARM9, and ARM9E" provides a comparison of the
DSP capabilities of three ARM cores, the widely-used ARM7, the newer
ARM9, and the ARM9's DSP-enhanced sibling, the ARM9E.

"Inside the Hitachi SH-4/STMicroelectronics ST40 and Hitachi
SH-5/STMicroelectronics ST50" provides detailed analysis of the two
processor cores jointly developed—but differently named—by Hitachi
Semiconductor and STMicroelectronics.

Now shipping:
"Inside the StarCore SC110" explores the low-power VLIW single-MAC DSP
core jointly developed by Agere and Motorola.

"Inside the Hitachi SH-DSP and SH3-DSP" covers two hybrid
DSP/microcontroller architectures in Hitachi's SuperH family, among
the most successful DSP-enhanced microcontrollers.

Watch for publication dates, excerpts from BDTI's analysis, and
example benchmark results on BDTI's Web site at www.BDTI.com.

For information on all of BDTI's technical reports, go to
www.BDTI.com/products/services_overview.htm#publications.

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***  New Processor Summary for the ADI/Intel MSA

BDTI maintains summary analyses of many DSPs and general-purpose
processors.  This provides DSP engineers and designers with a means to
quickly compare the key architectural features—e.g., data path,
memory architecture, and peripherals—of a wide variety of processors.
The list of processors is updated regularly, and we have recently
added a summary of the ADI/Intel Micro Signal Architecture.  Please
visit www.bdti.com/procsum/index.htm for more details.

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***  About BDTI

BDTI is an independent source for DSP technology analysis and
optimized DSP software.  From rigorous technical analyses of
processors for DSP, such as the "Buyer's Guide to DSP Processors," to
highly regarded technology training classes, BDTI is the trusted
independent source for reliable information on DSP technology.  For
more information, visit our Web site at www.BDTI.com.

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The next issue of BDTI's DSP Insider is coming in December. An archive
of previous issues of the BDTI DSP Insider will be available in the
future on BDTI's Web site.  If you have comments, suggestions, or
other feedback about the DSP Insider, please send email to
dspinsider@bdti.com.

BDTI's DSP Insider is a free monthly electronic newsletter published
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BDTI's DSP Insider (c) 2001 Berkeley Design Technology, Inc.
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