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Vol. I, No. 5 BDTI's DSP Insider September 2001
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This month:
*** Observations from Hot Chips
*** Do Mega-MACs Matter?
*** Benchmarking Your Own Processor
*** "Impulse Response," a news analysis and opinion column written
by Jeff Bier, BDTI's General Manager, and featured in EE Times
*** BDTI offers "Processors for DSP" Seminar at MPF 2001
*** New "Inside" Reports on StarCore, Hitachi, 3DSP, and ARM
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*** Observations from Hot Chips
At the thirteenth annual Hot Chips Conference held at Stanford
University, Professor Jan Rabaey of UC Berkeley's Wireless Research
Center presented an engaging tutorial on silicon platforms for
next-generation wireless systems. Professor Rabaey emphasized several
interesting themes in the course of his talk.
Foremost among these is the fact that modern wireless applications are
becoming increasingly demanding of processors. Perhaps this is best
exemplified by the increased channel coding requirements of
next-generation wireless systems. Due to the scarcity of radio
frequency bandwidth, increasingly complex coding schemes are required
in order to provide the efficient spectrum use that these
next-generation systems require. And it is not only algorithms that
are more complex—data rates are also growing rapidly. The result is a
tremendous increase in computation load.
According to Professor Rabaey, however, processors are not rising to
the occasion—increasing computational demands are easily outpacing
increasing processor performance. The result is that processors alone
are no longer sufficient to meet the demands of today's applications.
Even Texas Instruments, perhaps the strongest advocate of DSP
processors, validates this trend by using specialized coprocessors for
channel coding—even in its fastest, most state-of-the-art products.
The most efficient implementation of the heterogeneous elements
required to meet modern application demands is usually an ASIC;
however, developing an ASIC is expensive, time-consuming, and
inherently risky. FPGAs are the ultra-flexible alternative to ASICs,
but FPGA efficiency is severely compromised by the very thing that
makes FPGAs flexible—configurable logic elements and interconnections
that are generic.
Is there a happy medium? Professor Rabaey thinks so, and has proposed
a template-based SoC design approach that combines the flexibility of
an FPGA with the efficiency of an ASIC. The template-based approach
is not unlike toggling a set of different options when buying a new
PC—working within a general system architecture framework, one can
choose various processor grades, speeds, peripherals, etc. Thus,
using a template-based design approach, a system designer could create
multiple chips that incorporate reconfigurable, fixed-function, and
programmable elements; each chip could be configured for different
functionalities. For example, from a template for wireless
communication chips, a designer could build chips for cell phones,
cordless phones, wireless area networks, etc. And these individual
chips would themselves be reconfigurable; e.g., the cell phone chip
could be configured in the field to be compatible with multiple
wireless communications standards.
*** Do Mega-MACS Matter?
Because DSPs are typically assigned MAC-intensive tasks, one might
assume that DSP performance is directly related to MAC throughput. In
fact, vendors often advertise the speed of their DSPs in terms of
MMACS (millions of multiply-accumulates per second). However, BDTI
benchmark studies reveal that MAC throughput is not a reliable
indicator of real-world DSP performance.
One reason for this is that digital signal processing involves more
than just MACs; e.g., Viterbi decoding—an increasingly important DSP
task—doesn't use multiplication at all. And even MAC-intensive
algorithms may not be able to make full use of a processor's MAC
units—memory constraints often limit performance. The quad-MAC
StarCore SC140, for example, can perform two 64-bit loads per cycle,
but the loads must be aligned on 64-bit boundaries. Thus, if input
data is unaligned, the SC140 cannot take full advantage of all its MAC
units. Pipeline constraints may also limit performance: many
instructions on the quad-MAC TI TMS320C64xx have multi-cycle
latencies; this can significantly affect task execution times,
particularly on short algorithms. Control overhead is also a key
consideration—the StarCore SC110 and SC140 have better support for
conditional execution than most DSPs, and thus these processors
benefit from fewer inefficient test-and-branch sequences.
So while MMACS may matter, they are not everything—other factors play
important roles in actual DSP performance. A recent BDTI study
highlights this point: a 300 MHz single-MAC SC110 is actually about
twice as fast as a 200 MHz dual-MAC TMS320C55xx. A more detailed
analysis of this comparison is available in BDTI's new "Inside the
StarCore SC110" report. Visit www.BDTI.com for more information.
*** BDTI Case Study
This month: Benchmarking Your Own Processor
Without benchmarks, it is impossible to meaningfully compare the
performance of different processors. The BDTI Benchmarks(TM)—a suite
of twelve DSP algorithm kernels representative of DSP operations—have
become the industry standard in DSP benchmarking. BDTI publishes its
benchmark results for a wide range of commercially available
processors. Designers, however, often need information about a
processor's performance before silicon production or the availability
of solid software tools.
In these cases, designers can license the BDTI Benchmark
Specification, which allows designers to implement the BDTI Benchmarks
on a processor before it has been cast. The BDTI Benchmark
Specification provides the means for developers to implement the BDTI
Benchmark suite in assembly language, revealing the processor's true
potential. Licensors of the BDTI Benchmark Specification receive
benchmark reference C source code, examples of assembly code for a
commonly used DSP processor, benchmark test vectors, a one year
license to use the benchmark specification, and both training and
technical support.
In-house implementation of the BDTI Benchmarks facilitates comparison
with the benchmark results of other processors, which are published in
an extensive series of BDTI reports. Chip vendors can later have
their product's benchmark results certified and/or optimized by BDTI;
certified results can then be disclosed in accordance with BDTI's
disclosure policies.
*** Impulse Response, by Jeff Bier
This month: Broadband: Getting Nowhere Fast
In an obscure corner of 3COM's Web site is an epitaph; a barren
savannah landscape with a lone tree in the background frames the
phrase "End of Life." The death in question was not that of a zebra
or wildebeest—in these modern technological proving grounds it was
the innovative Kerbango Internet Radio that was recently deemed unfit.
Kerbango is not alone. While streaming media technology has been
refined to the point that dozens of great consumer applications are
now possible, these applications are being held back by the lack of
home broadband Internet connections—the only type of connection fast
enough to fuel streaming media applications.
Given the many uses of broadband, why hasn't it proliferated into our
homes? The answer is that there are really only two types of home
broadband providers today, and neither is celebrated for its rapid
technology deployment, quality customer service, or competitive
pricing.
In the U.S., giant telephone and cable television operators have a
virtual duopoly on broadband Internet access. While dozens of
resellers and purveyors of competing technology have tried to break
into the market, their progress has been minimal. Most find it
impossible to compete with the larger incumbents.
A recent paper by Professor Yale Braunstein of UC Berkeley concludes
that the Bell companies are causing unreasonable delays in providing
DSL connections and that their prices are unjustifiably high. The
result, according to a recent Yankee Group study, is that fewer than
11% of U.S. residential Internet subscribers have a broadband
connection.
Some companies are developing related kinds of consumer products that
don't rely on broadband Internet connections. For example, Sirius and
XM Radio are both developing satellite digital audio broadcast
services. But sidestepping the Internet involves compromise—these
systems are not interactive, and thus offer significantly less
flexibility than those—like Internet radio—based on broadband
connections.
It really is no small irony: broadband—the fastest type of Internet
connection—is being deployed at an almost glacial pace. Sadly, this
slow rollout is stunting the growth of streaming media applications.
These new applications are so compelling that they are bound to
proliferate one day. The question is whether we will have to wait
five years, or twenty-five.
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*** BDTI offers "Processors for DSP" Seminar at MPF 2001
There's still time to register for BDTI's highly-rated seminar,
"Processors for DSP," at the 2001 Microprocessor Forum. Newly updated
to include current high-profile devices as well as
soon-to-be-announced architectures, this seminar will help both
experienced professionals and new entrants to the processor world
understand the choices available in the ever crowded marketplace for
processors targeting DSP applications. Both the strengths and
weaknesses of key architectures and products will be covered. MPF
2001 will be held at the Fairmont Hotel in San Jose from October 15 to
19. "Processors for DSP" will be offered on Friday, October 19.
For more information on this and other industry events, go to
http://www.BDTI.com/bdti_whatsnew.htm.
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*** New "Inside" Reports on StarCore, Hitachi, 3DSP, and ARM
BDTI continues to roll out detailed analyses of key processors
targeting digital signal processing applications.
Now shipping: "Inside the StarCore SC110" explores the low-power VLIW
single-MAC DSP core jointly developed by Agere and Motorola. With the
high-performance SC140 targeting wireless infrastructure applications,
it seems likely that these major players in wireless will look to
apply the SC110 to handheld applications. The report contains a
detailed performance analysis and in-depth evaluation of the SC110
architecture.
"Inside the Hitachi SH-DSP and SH3-DSP" covers two hybrid
DSP/microcontroller architectures in Hitachi's SuperH family. The
report provides analysis and insight into the SH-DSP and
SH3-DSP—among the most successful DSP-enhanced microcontrollers. The
report uncovers the strengths—and weaknesses—of these two high
volume chips.
Scheduled for publication this fall:
"Inside the 3DSP SP5"
"Inside the ARM ARM7, ARM9, and ARM9E"
"Inside the Hitachi SH-4 & SH-5 and STMicroelectronics ST40 & ST50"
Details on these reports will be announced in the next edition
of BDTI's DSP Insider and on BDTI's Web site at www.BDTI.com.
For information on BDTI's technical reports, click on the links on
BDTI's home page at http://www.BDTI.com.
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*** About BDTI
BDTI is an independent source for DSP technology analysis and
optimized DSP software. From rigorous technical analyses of
processors for DSP, such as the "Buyer's Guide to DSP Processors," to
highly regarded technology training classes, BDTI is the trusted
independent source for reliable information on DSP technology. For
more information, visit our Web site at www.BDTI.com.
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*** BDTI Is Hiring
Despite these tough economic times, BDTI's business continues to grow,
and we are looking for a few high caliber professionals to join our
team. Both entry level and senior positions are available for DSP
Analysts and Embedded Software Engineers. For more information,
please see www.BDTI.com/jobs_employment.htm.
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The next issue of BDTI's DSP Insider is coming in October. An archive
of previous issues of the BDTI DSP Insider will be up soon on BDTI's
Web site.
BDTI's DSP Insider is a free monthly electronic newsletter published
by Berkeley Design Technology, Inc. If our newsletter was forwarded
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BDTI's DSP Insider (c) 2001 Berkeley Design Technology, Inc.
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