Non-Conventional Useof Execution Units
IS-54 convolutional encoder bit-interleaving on Pentium
- Pentium can’t do single-cycle
rcl ecx, 1 ; rotate, insert prev carry bit
shl eax, 1 ; shift, generate new carry bit
- But it can do single-cycle
rcl ecx, 1 ; rotate, insert prev carry bit
add eax, eax ; shift, generate new carry bit
Vector maximum search on the ZSP ZSP164xx
loop: ldu r15,r14,1 ; new 16-bit value in ; r15, address in r14
max.e r4,r14 ; 32-bit max {r5,r4},
;{r15,r14} includes address